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Machine learning for electronic design automation: A survey
With the down-scaling of CMOS technology, the design complexity of very large-scale
integrated is increasing. Although the application of machine learning (ML) techniques in …
integrated is increasing. Although the application of machine learning (ML) techniques in …
A survey of machine learning for computer architecture and systems
It has been a long time that computer architecture and systems are optimized for efficient
execution of machine learning (ML) models. Now, it is time to reconsider the relationship …
execution of machine learning (ML) models. Now, it is time to reconsider the relationship …
Scalehls: A new scalable high-level synthesis framework on multi-level intermediate representation
High-level synthesis (HLS) has been widely adopted as it significantly improves the
hardware design productivity and enables efficient design space exploration (DSE). Existing …
hardware design productivity and enables efficient design space exploration (DSE). Existing …
IRONMAN-PRO: Multiobjective design space exploration in HLS via reinforcement learning and graph neural network-based modeling
Despite the great success of high-level synthesis (HLS) tools, we observe several
unresolved challenges: 1) the high-level abstraction of HLS programming styles sometimes …
unresolved challenges: 1) the high-level abstraction of HLS programming styles sometimes …
Accurate operation delay prediction for FPGA HLS using graph neural networks
Modern heterogeneous FPGA architectures incorporate a variety of hardened blocks for
boosting the performance of arithmetic-intensive designs, such as DSP blocks and carry …
boosting the performance of arithmetic-intensive designs, such as DSP blocks and carry …
High-level synthesis performance prediction using gnns: Benchmarking, modeling, and advancing
Agile hardware development requires fast and accurate circuit quality evaluation from early
design stages. Existing work of high-level synthesis (HLS) performance prediction usually …
design stages. Existing work of high-level synthesis (HLS) performance prediction usually …
High-level synthesis hardware design for fpga-based accelerators: Models, methodologies, and frameworks
Hardware accelerators based on field programmable gate array (FPGA) and system on chip
(SoC) devices have gained attention in recent years. One of the main reasons is that these …
(SoC) devices have gained attention in recent years. One of the main reasons is that these …
IRONMAN GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning
Despite the great success of High-Level Synthesis (HLS) tools, we observe several
unresolved challenges: 1) the high-level abstraction of programming styles in HLS conceals …
unresolved challenges: 1) the high-level abstraction of programming styles in HLS conceals …
Programming and synthesis for software-defined FPGA acceleration: status and future prospects
FPGA-based accelerators are increasingly popular across a broad range of applications,
because they offer massive parallelism, high energy efficiency, and great flexibility for …
because they offer massive parallelism, high energy efficiency, and great flexibility for …
Survey of machine learning for electronic design automation
An increase in demand for semiconductor ICs, recent advancements in machine learning,
and the slowing down of Moore's law have all contributed to the increased interest in using …
and the slowing down of Moore's law have all contributed to the increased interest in using …