Recent changes in CMOS device structures and materials motivated by impending atomistic
and quantum-mechanical limitations have profoundly influenced the nature of delay and …

This paper discusses Voltage Islands, a system architecture and chip implementation
methodology, that can be used to dramatically reduce active and static power consumption …

Careful design and verification of the power distribution network of a chip are of critical
importance to ensure its reliable performance. With the increasing number of transistors on a …

The re-emerging interconnect problem is quickly becoming a major bottleneck to the
performance enhancement and cost reduction of modern digital systems. To overcome this …

Design for Manufacturability and Statistical Design: A Constructive Approach provides a
thorough treatment of the causes of variability, methods for statistical data characterization …

Benchmarks are an immensely useful tool in performing research since they allow for rapid
and clear comparison between different approaches to solving CAD problems. Recent …

Modern submicron very large scale integration designs include huge power grids that are
required to distribute large amounts of current, at increasingly lower voltages. The resulting …

In this paper, we propose preconditioned Krylov-subspace iterative methods to perform
efficient DC and transient simulations for large-scale linear circuits with an emphasis on …

This paper presents a technique for characterizing the statistical properties and spectrum of
power supply noise using only two on-chip low-throughput samplers. The samplers utilize a …

This paper analyzes the impact of power-supply noise on the performance of high-frequency
microprocessors. First, delay models that take this noise into account are proposed for …