Vertical transistor devices are described. For example, in one embodiment, a vertical
transistor device includes an epitaxial source semiconductor region disposed on a …

A bottom pinned perpendicular magnetic tunnel junction (pMTJ) with high TMR which can
withstand high temperature back-end-of-line (BEOL) processing is disclosed. The pMTJ …

(57) ABSTRACT A variable resistance memory device includes different variable resistance
patterns on different memory regions of a substrate. The different variable resistance …

A device and a method of forming a device are presented. A substrate is provided. The
substrate includes circuit component formed on a substrate surface. Back end of line …

According to one embodiment, a semiconductor device includes first to third semiconductor
regions and first to third conductors. The second semiconductor region is separated from the …

Embodiments of the present invention facilitate efficient and effective increased memory cell
density configuration. In one embodiment, a semiconductor device comprises: a first pillar …

Embodiments of the present invention facilitate efficient and effective increased memory cell
density configuration. In one embodiment, the method comprises: forming a first pitch …

2015-02-03 Assigned to SAMSUNG ELECTRONICS CO., LTD. reassignment SAMSUNG
ELECTRONICS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT …

Some embodiments include a memory array having a first memory cell adjacent to a second
memory cell along a lateral direction. The second memory cell is vertically offset relative to …

Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods
of fabricating perpendicular STTM devices having offset cells are described. For example, a …