[PDF][PDF] Active hardware metering for intellectual property protection and security.

Y Alkabani, F Koushanfar - USENIX security symposium, 2007 - usenix.org
We introduce the first active hardware metering scheme that aims to protect integrated
circuits (IC) intellectual property (IP) against piracy and runtime tampering. The novel …

VARIUS: A model of process variation and resulting timing errors for microarchitects

SR Sarangi, B Greskamp, R Teodorescu… - IEEE Transactions …, 2008 - ieeexplore.ieee.org
Within-die parameter variation poses a major challenge to high-performance
microprocessor design, negatively impacting a processor's frequency and leakage power …

A 65 nm Sub- Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter

J Kwong, YK Ramadass, N Verma… - IEEE Journal of solid …, 2008 - ieeexplore.ieee.org
Aggressive supply voltage scaling to below the device threshold voltage provides significant
energy and leakage power reduction in logic and SRAM circuits. Consequently, it is a …

Hardware Trojan horse detection using gate-level characterization

M Potkonjak, A Nahapetian, M Nelson… - Proceedings of the 46th …, 2009 - dl.acm.org
Hardware Trojan horses (HTHs) are the malicious altering of hardware specification or
implementation in such a way that its functionality is altered under a set of conditions defined …

Testing techniques for hardware security

M Majzoobi, F Koushanfar… - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
System security has emerged as a premier design requirement. While there has been an
enormous body of impressive work on testing integrated circuits (ICs) desiderata such as …

Understanding the effect of process variations on the delay of static and domino logic

M Alioto, G Palumbo, M Pennisi - IEEE Transactions on Very …, 2009 - ieeexplore.ieee.org
In this paper, the effect of process variations on delay is analyzed in depth for both static and
dynamic CMOS logic styles. Analysis allows for gaining an insight into the delay …

[KNIHA][B] Carbon nanotube based VLSI interconnects: Analysis and design

BK Kaushik, MK Majumder - 2015 - Springer
Aggressive scaling of semiconductor process technology over the last several decades has
resulted in creation of many new products, such as computers, camera, cell phones, and …

Next generation micro-power systems

AP Chandrakasan, DC Daly, J Kwong… - … IEEE Symposium on …, 2008 - ieeexplore.ieee.org
Emerging microsystems such as portable and implantable medical electronics, wireless
microsensors and next-generation portable multimedia devices demand a dramatic …

Breaking the simulation barrier: SRAM evaluation through norm minimization

L Dolecek, M Qazi, D Shah… - 2008 IEEE/ACM …, 2008 - ieeexplore.ieee.org
With process variation becoming a growing concern in deep submicron technologies, the
ability to efficiently obtain an accurate estimate of failure probability of SRAM components is …

Leakage power analysis attacks: A novel class of attacks to nanometer cryptographic circuits

M Alioto, L Giancane, G Scotti… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
In this paper, a novel class of power analysis attacks to cryptographic circuits is presented.
These attacks aim at recovering the secret key of a cryptographic core from measurements …