A survey of coarse-grained reconfigurable architecture and design: Taxonomy, challenges, and applications
As general-purpose processors have hit the power wall and chip fabrication cost escalates
alarmingly, coarse-grained reconfigurable architectures (CGRAs) are attracting increasing …
alarmingly, coarse-grained reconfigurable architectures (CGRAs) are attracting increasing …
Eyeriss: A spatial architecture for energy-efficient dataflow for convolutional neural networks
Deep convolutional neural networks (CNNs) are widely used in modern AI systems for their
superior accuracy but at the cost of high computational complexity. The complexity comes …
superior accuracy but at the cost of high computational complexity. The complexity comes …
Plasticine: A reconfigurable architecture for parallel paterns
Reconfigurable architectures have gained popularity in recent years as they allow the
design of energy-efficient accelerators. Fine-grain fabrics (eg FPGAs) have traditionally …
design of energy-efficient accelerators. Fine-grain fabrics (eg FPGAs) have traditionally …
Spatial: A language and compiler for application accelerators
Industry is increasingly turning to reconfigurable architectures like FPGAs and CGRAs for
improved performance and energy efficiency. Unfortunately, adoption of these architectures …
improved performance and energy efficiency. Unfortunately, adoption of these architectures …
NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules
Energy consumed for transferring data across the processor memory hierarchy constitutes a
large fraction of total system energy consumption, and this fraction has steadily increased …
large fraction of total system energy consumption, and this fraction has steadily increased …
Using dataflow to optimize energy efficiency of deep neural network accelerators
The authors demonstrate the key role dataflows play in the optimization of energy efficiency
for deep neural network (DNN) accelerators. By introducing a systematic approach to …
for deep neural network (DNN) accelerators. By introducing a systematic approach to …
MachSuite: Benchmarks for accelerator design and customized architectures
Recent high-level synthesis and accelerator-related architecture papers show a great
disparity in workload selection. To improve standardization within the accelerator research …
disparity in workload selection. To improve standardization within the accelerator research …
Stream-dataflow acceleration
Demand for low-power data processing hardware continues to rise inexorably. Existing
programmable and" general purpose" solutions (eg. SIMD, GPGPUs) are insufficient, as …
programmable and" general purpose" solutions (eg. SIMD, GPGPUs) are insufficient, as …
Dsagen: Synthesizing programmable spatial accelerators
Domain-specific hardware accelerators can provide orders of magnitude speedup and
energy efficiency over general purpose processors. However, they require extensive manual …
energy efficiency over general purpose processors. However, they require extensive manual …
Fifer: Practical acceleration of irregular applications on reconfigurable architectures
Coarse-grain reconfigurable arrays (CGRAs) can achieve much higher performance and
efficiency than general-purpose cores, approaching the performance of a specialized design …
efficiency than general-purpose cores, approaching the performance of a specialized design …