A 1.1 V 16Gb DDR5 DRAM with probabilistic-aggressor tracking, refresh-management functionality, per-row hammer tracking, a multi-step precharge, and core-bias …
W Kim, C Jung, S Yoo, D Hong, J Hwang… - … Solid-State Circuits …, 2023 - ieeexplore.ieee.org
DRAM products have been recently adopted in a wide range of high-performance
computing applications: such as in cloud computing, in big data systems, and loT devices …
computing applications: such as in cloud computing, in big data systems, and loT devices …
A density metric for semiconductor technology [point of view]
Since its inception, the semiconductor industry has used a physical dimension (the minimum
gate length of a transistor) as a means to gauge continuous technology advancement. This …
gate length of a transistor) as a means to gauge continuous technology advancement. This …
Understanding and modeling on-die error correction in modern DRAM: An experimental study using real devices
Experimental characterization of DRAM errors is a powerful technique for understanding
DRAM behavior and provides valuable insights for improving overall system performance …
DRAM behavior and provides valuable insights for improving overall system performance …
25.2 a 16gb sub-1v 7.14 gb/s/pin lpddr5 sdram applying a mosaic architecture with a short-feedback 1-tap dfe, an fss bus with low-level swing and an adaptively …
YH Kim, HJ Kim, J Choi, MS Ahn, D Lee… - … Solid-State Circuits …, 2021 - ieeexplore.ieee.org
The demand for mobile DRAM has increased, with a requirement for high density, high data
rates, and low-power consumption to support applications such as 5G communication …
rates, and low-power consumption to support applications such as 5G communication …
28.7 a 1.1 v 6.4 gb/s/pin 24-gb ddr5 sdram with a highly-accurate duty corrector and nbti-tolerant dll
D Kwon, HS Jeong, J Choi, W Kim… - … Solid-State Circuits …, 2023 - ieeexplore.ieee.org
The need for high-quality multi-media data increases the amount of data to be stored and
processed, necessitating DDR5 to achieve high-density and high-speed with low-power …
processed, necessitating DDR5 to achieve high-density and high-speed with low-power …
A 16Gb 9.5 Gb/S/pin LPDDR5X SDRAM with low-power schemes exploiting dynamic voltage-frequency scaling and offset-calibrated readout sense amplifiers in a …
Mobile systems for 5G communications and emerging technologies, such as advanced
driver assistance system (ADAS), augmented reality (AR), and artificial intelligence (AI) …
driver assistance system (ADAS), augmented reality (AR), and artificial intelligence (AI) …
Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes
M Patel - arxiv preprint arxiv:2204.10387, 2022 - arxiv.org
Improvements in main memory storage density are primarily driven by process technology
scaling, which negatively impacts reliability by exacerbating various circuit-level error …
scaling, which negatively impacts reliability by exacerbating various circuit-level error …
22.2 An 8.5 Gb/s/pin 12Gb-LPDDR5 SDRAM with a hybrid-bank architecture using skew-tolerant, low-power and speed-boosting techniques in a 2nd generation …
HJ Chi, CK Lee, J Park, JS Heo, J Jung… - … Solid-State Circuits …, 2020 - ieeexplore.ieee.org
Energy efficiency in mobile devices is a pivotal criteria from the overall system point of view,
Although the 7, 5Gb/s 8Gb LPDDR5 [1], with low-power schemes (internal data copy …
Although the 7, 5Gb/s 8Gb LPDDR5 [1], with low-power schemes (internal data copy …
23.1 a 7.5 Gb/s/pin LPDDR5 SDRAM with WCK clocking and non-target ODT for high speed and with DVFS, internal data copy, and deep-sleep mode for low power
KS Ha, CK Lee, D Lee, D Moon, JH Jang… - … Solid-State Circuits …, 2019 - ieeexplore.ieee.org
High-speed and low-power techniques for the latest mobile DRAMs, such as LPDDR4/4X [1–
3], have been developed to enable high-resolution displays, multiple cameras and 4G …
3], have been developed to enable high-resolution displays, multiple cameras and 4G …
A 0.85-pJ/b 16-Gb/s/Pin Single-Ended Transmitter With Integrated Voltage Modulation for Low-Power Memory Interfaces
A single-ended transmitter achieves low power consumption with an integrated voltage
modulation (IVM) scheme for memory interfaces. The transmitter preserves the power …
modulation (IVM) scheme for memory interfaces. The transmitter preserves the power …