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Multiply accumulate operations in memristor crossbar arrays for analog computing
Memristors are now becoming a prominent candidate to serve as the building blocks of non-
von Neumann in-memory computing architectures. By map** analog numerical matrices …
von Neumann in-memory computing architectures. By map** analog numerical matrices …
RETRACTED ARTICLE: A nano-scale design of a multiply-accumulate unit for digital signal processing based on quantum computing
SS Ahmadpour, NJ Navimipour, S Yalcin… - Optical and Quantum …, 2024 - Springer
Digital signal processing (DSP) is used in computer processing to conduct different signal-
processing tasks. The DSPs are used in the series numbers representing a continuous …
processing tasks. The DSPs are used in the series numbers representing a continuous …
A high-performance multiply-accumulate unit by integrating additions and accumulations into partial product reduction process
In this paper, we propose a low-power high-speed pipeline multiply-accumulate (MAC)
architecture. In a conventional MAC, carry propagations of additions (including additions in …
architecture. In a conventional MAC, carry propagations of additions (including additions in …
Exploring the Use of DNS as a Search Engine for the Web of Things
Sensor technology is becoming pervasive in our everyday lives, measuring the real world
around us. The Internet of Things enables sensor devices to become active citizens of the …
around us. The Internet of Things enables sensor devices to become active citizens of the …
A high-speed, energy-efficient two-cycle multiply-accumulate (MAC) architecture and its application to a double-throughput MAC unit
We propose a high-speed and energy-efficient two-cycle multiply-accumulate (MAC)
architecture that supports two's complement numbers, and includes accumulation guard bits …
architecture that supports two's complement numbers, and includes accumulation guard bits …
[PDF][PDF] Sensor less Control of BLDC Motor using Fuzzy logic controller for Solar power Generation
Brushless dc (BLDC) motors are electronic controlled and have the rotor position for
commutating the stator winding current. This paper presents the BLDC motor sensor less …
commutating the stator winding current. This paper presents the BLDC motor sensor less …
[PDF][PDF] Implementation of area optimized low power multiplication and accumulation
There is number of computations involved at every stage in Digital Signal Processing (DSP).
At every stage of computation we have addition and multiplication of the terms derived from …
At every stage of computation we have addition and multiplication of the terms derived from …
Performance evolution of 4-b bit MAC unit using hybrid GDI and transmission gate based adder and multiplier circuits in 180 and 90 nm technology
This paper presents the high-speed adder circuit design based on 18 transistor (18T) full
swing gate diffusion input based logic gates and transmission based techniques to compute …
swing gate diffusion input based logic gates and transmission based techniques to compute …
Design of MAC unit for digital filters in signal processing and communication
Digital signal processors (DSP) the endless requirement is the development of ability in
processors to hold the difficulties resulted in the assimilation of CPU cores in a particular IC …
processors to hold the difficulties resulted in the assimilation of CPU cores in a particular IC …
Design of all-optical parallel multipliers using semiconductor optical amplifier-based Mach–Zehnder interferometers
Due to the benefits of low power, high bandwidth and complementary metal-oxide-
semiconductor (CMOS) compatibility, the design of optical circuits has spurred great …
semiconductor (CMOS) compatibility, the design of optical circuits has spurred great …