Dot product operations on sparse matrix elements

A Appu, S Maiyuran, M MacPherson, F Fu… - US Patent …, 2023 - Google Patents
2020-12-16 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Graphics processing unit processing and caching improvements

S Maiyuran, D Bilagi, J Ray, S Janus… - US Patent …, 2024 - Google Patents
2021-03-15 Assigned to INTEL CORPORATION reassignment INTEL CORPORATION
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors …

Graphics processor operation scheduling for deterministic latency

J Ray, S Panneer, S Tangri, B Ashbaugh… - US Patent …, 2024 - Google Patents
Embodiments described herein include software, firmware, and hardware that provides
techniques to enable deterministic scheduling across multiple general-purpose graphics …

Instruction based control of memory attributes

J Ray, A Koker, V George, M MacPherson… - US Patent …, 2024 - Google Patents
Embodiments described herein provide techniques to facilitate instruction-based control of
memory attributes. One embodiment provides a graphics processor comprising a processing …

Systems and methods for improving cache efficiency and utilization

A Koker, J Ray, B Ashbaugh, J Pearce, A Appu… - US Patent …, 2025 - Google Patents
Abstract Systems and methods for improving cache efficiency and utilization are disclosed.
In one embodiment, a graphics processor includes processing resources to perform …

Multi-tile architecture for graphics operations

A Koker, B Ashbaugh, S Janus… - US Patent …, 2024 - Google Patents
Embodiments are generally directed to a multi-tile architecture for graphics operations. An
embodiment of an apparatus includes a multi-tile architecture for graphics operations …

Concurrent multi-datatype execution within a processing resource

E Ould-Ahmed-Vall, B Lakshmanan… - US Patent …, 2024 - Google Patents
One embodiment provides for a graphics processing unit (GPU) to accelerate machine
learning operations, the GPU comprising an instruction cache to store a first instruction and …

Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format

S Maiyuran, S Marwaha, A Garg, S Pal, J Parra… - US Patent …, 2024 - Google Patents
US12007935B2 - Graphics processors and graphics processing units having dot product
accumulate instruction for hybrid floating point format - Google Patents US12007935B2 …

Assistance for hardware prefetch in cache access

A Koker, V George, A Anantaraman, V Andrei… - US Patent …, 2024 - Google Patents
Embodiments are generally directed to graphics processor data access and sharing. An
embodiment of an apparatus includes a circuit element to produce a result in processing of …

Instructions and logic to perform floating point and integer operations for machine learning

H Kaul, MA Anders, SK Mathew, A Yao, J Ray… - US Patent …, 2024 - Google Patents
One embodiment provides for a graphics processing unit to accelerate machine-learning
operations, the graphics processing unit comprising a multiprocessor having a single …