Applying deep learning to the cache replacement problem
Despite its success in many areas, deep learning is a poor fit for use in hardware predictors
because these models are impractically large and slow, but this paper shows how we can …
because these models are impractically large and slow, but this paper shows how we can …
New attacks and defense for encrypted-address cache
MK Qureshi - Proceedings of the 46th International Symposium on …, 2019 - dl.acm.org
Conflict-based cache attacks can allow an adversary to infer the access pattern of a co-
running application by orchestrating evictions via cache conflicts. Such attacks can be …
running application by orchestrating evictions via cache conflicts. Such attacks can be …
Pythia: A customizable hardware prefetching framework using online reinforcement learning
Past research has proposed numerous hardware prefetching techniques, most of which rely
on exploiting one specific type of program context information (eg, program counter …
on exploiting one specific type of program context information (eg, program counter …
An imitation learning approach for cache replacement
Program execution speed critically depends on increasing cache hits, as cache hits are
orders of magnitude faster than misses. To increase cache hits, we focus on the problem of …
orders of magnitude faster than misses. To increase cache hits, we focus on the problem of …
Back to the future: Leveraging Belady's algorithm for improved cache replacement
Belady's algorithm is optimal but infeasible because it requires knowledge of the future. This
paper explains how a cache replacement algorithm can nonetheless learn from Belady's …
paper explains how a cache replacement algorithm can nonetheless learn from Belady's …
Fundamental latency trade-off in architecting dram caches: Outperforming impractical sram-tags with a simple and practical design
This paper analyzes the design trade-offs in architecting large-scale DRAM caches. Prior
research, including the recent work from Loh and Hill, have organized DRAM caches similar …
research, including the recent work from Loh and Hill, have organized DRAM caches similar …
A hierarchical neural model of data prefetching
This paper presents Voyager, a novel neural network for data prefetching. Unlike previous
neural models for prefetching, which are limited to learning delta correlations, our model can …
neural models for prefetching, which are limited to learning delta correlations, our model can …
Cameo: A two-level memory organization with capacity of main memory and flexibility of hardware-managed cache
This paper analyzes the trade-offs in architecting stacked DRAM either as part of main
memory or as a hardware-managed cache. Using stacked DRAM as part of main memory …
memory or as a hardware-managed cache. Using stacked DRAM as part of main memory …
A survey of machine learning-based system performance optimization techniques
H Choi, S Park - Applied Sciences, 2021 - mdpi.com
Recently, the machine learning research trend expands to the system performance
optimization field, where it has still been proposed by researchers based on their intuitions …
optimization field, where it has still been proposed by researchers based on their intuitions …
Perceptron learning for reuse prediction
The disparity between last-level cache and memory latencies motivates the search for
efficient cache management policies. Recent work in predicting reuse of cache blocks …
efficient cache management policies. Recent work in predicting reuse of cache blocks …