This book is a comprehensive guide to new DFT methods that will show the readers how to
design a testable and quality product, drive down test cost, improve product quality and …

Test data compression consists of test vector compression on the input side and response,
compaction on the output side. This vector compression has been an active area of …

Selective Huffman coding has recently been proposed for efficient test-data compression
with low hardware overhead. In this paper, we show that the already proposed encoding …

This paper presents a new test-data compression technique that uses exactly nine
codewords. Our technique aims at precomputed data of intellectual property cores in system …

This paper presents a perspective on the impact and use of new media that focuses on the
strength of the interpersonal tie connecting communicators. Research shows that more …

One of the major challenges in testing a system-on-a-chip is dealing with the large volume of
test data. To reduce the volume of test data, several test data compression techniques have …

The run length based coding schemes have been very effective for the test data
compression in case of current generation SoCs with a large number of IP cores. The first …

Higher circuit densities in system-on-chip (SOC) designs have led to drastic increase in test
data volume. Larger test data size demands not only higher memory requirements, but also …

We present a new approach for deterministic built-in self-test (BIST) in which a
reconfigurable interconnection network (RIN) is placed between the outputs of a …

We present a selective encoding method that reduces test data volume and test application
time for scan testing of intellectual property (IP) cores. This method encodes the slices of test …