A survey on stateful data plane in software defined networks

X Zhang, L Cui, K Wei, FP Tso, Y Ji, W Jia - Computer Networks, 2021 - Elsevier
Abstract Software Defined Networking (SDN), which decouples control plane and data
plane, normally stores states on controllers to provide flexible programmability and …

Corundum: An open-source 100-gbps nic

A Forencich, AC Snoeren, G Porter… - 2020 IEEE 28th Annual …, 2020 - ieeexplore.ieee.org
Corundum is an open-source, FPGA-based prototy** platform for network interface
development at up to 100 Gbps and beyond. The Corundum platform includes several core …

Xenic: SmartNIC-accelerated distributed transactions

HN Schuh, W Liang, M Liu, J Nelson… - Proceedings of the …, 2021 - dl.acm.org
High-performance distributed transactions require efficient remote operations on database
memory and protocol metadata. The high communication cost of this workload calls for …

{PANIC}: A {High-Performance} programmable {NIC} for multi-tenant networks

J Lin, K Patel, BE Stephens, A Sivaraman… - … USENIX Symposium on …, 2020 - usenix.org
Programmable NICs have diverse uses, and there is need for a NIC platform that can offload
computation from multiple co-resident applications to many different types of substrates …

Smartnic performance isolation with fairnic: Programmable networking for the cloud

S Grant, A Yelam, M Bland, AC Snoeren - Proceedings of the Annual …, 2020 - dl.acm.org
Multiple vendors have recently released SmartNICs that provide both special-purpose
accelerators and programmable processing cores that allow increasingly sophisticated …

Fast, scalable, and programmable packet scheduler in hardware

V Shrivastav - Proceedings of the ACM Special Interest Group on …, 2019 - dl.acm.org
With increasing link speeds and slowdown in the scaling of CPU speeds, packet scheduling
in software is resulting in lower precision and higher CPU utilization. By offloading packet …

Programmable calendar queues for high-speed packet scheduling

NK Sharma, C Zhao, M Liu, PG Kannan, C Kim… - … USENIX Symposium on …, 2020 - usenix.org
Packet schedulers traditionally focus on the prioritized transmission of packets. Scheduling
is often realized through coarse-grained queue-level priorities, as in today's switches, or …

Reexamining direct cache access to optimize {I/O} intensive applications for multi-hundred-gigabit networks

A Farshin, A Roozbeh, GQ Maguire Jr… - 2020 USENIX Annual …, 2020 - usenix.org
Memory access is the major bottleneck in realizing multi-hundred-gigabit networks with
commodity hardware, hence it is essential to make good use of cache memory that is a …

When idling is ideal: Optimizing tail-latency for heavy-tailed datacenter workloads with perséphone

HM Demoulin, J Fried, I Pedisich, M Kogias… - Proceedings of the …, 2021 - dl.acm.org
This paper introduces Perséphone, a kernel-bypass OS scheduler designed to minimize tail
latency for applications executing at microsecond-scale and exhibiting wide service time …

Contention-aware performance prediction for virtualized network functions

A Manousis, RA Sharma, V Sekar… - Proceedings of the Annual …, 2020 - dl.acm.org
At the core of Network Functions Virtualization lie Network Functions (NFs) that run co-
resident on the same server, contend over its hardware resources and, thus, might suffer …