Deep Neural Networks (DNNs) have emerged as the core enabler of many major
applications on mobile devices. To achieve high accuracy, DNN models have become …

In this paper we focus on common data reorganization operations such as shuffle,
pack/unpack, swap, transpose, and layout transformations. Although these operations …

In this paper, we presen t the design and use of a comprehensiv e framework, SimplePower,
for ev aluating the effect of high-level algorithmic, architectural, and compilation trade-offs on …

Compiler transformations can significantly improve data locality for many scientific programs.
In this paper, we show iterative solvers for partial differential equations (PDEs) in three …

With the emergence of a plethora of embedded and portable applications, energy
dissipation has joined throughput, area, and accuracy/precision as a major design …

High-level compiler optimizations ha ve been widely used to ac hiev e speedups on array-
based codes. Su ch optimizations are becoming increasingly important in embedded signal …

Many important applications, such as those using sparse data structures, have memory
reference patterns that are unknown at compile-time. Prior work has developed run-time …

Recently, several experimental studies have been conducted on block data layout in
conjunction with tiling as a data transformation technique to improve cache performance. In …

In this paper we investigate map** stream programs (ie, programs written in a streaming
style for streaming architectures such as Imagine and Raw) onto a general-purpose CPU …

With increasing numbers of cores, future CMPs (chip multi-processors) are likely to have a
tiled architecture with a portion of shared L2 cache on each tile and a bank-interleaved …