Turnitin
降AI改写
早检测系统
早降重系统
Turnitin-UK版
万方检测-期刊版
维普编辑部版
Grammarly检测
Paperpass检测
checkpass检测
PaperYY检测
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the
processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies …
processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies …
PIPP: Promotion/insertion pseudo-partitioning of multi-core shared caches
Y **e, GH Loh - ACM SIGARCH Computer Architecture News, 2009 - dl.acm.org
Many multi-core processors employ a large last-level cache (LLC) shared among the
multiple cores. Past research has demonstrated that sharing-oblivious cache management …
multiple cores. Past research has demonstrated that sharing-oblivious cache management …
Microarchitecture-independent workload characterization
K Hoste, L Eeckhout - IEEE micro, 2007 - ieeexplore.ieee.org
For computer designers, understanding the characteristics of workloads running on current
and future computer systems is of utmost importance during microprocessor design a …
and future computer systems is of utmost importance during microprocessor design a …
Minebench: A benchmark suite for data mining workloads
R Narayanan, B Ozisikyilmaz… - 2006 IEEE …, 2006 - ieeexplore.ieee.org
Data mining constitutes an important class of scientific and commercial applications. Recent
advances in data extraction techniques have created vast data sets, which require …
advances in data extraction techniques have created vast data sets, which require …
Thermal herding: Microarchitecture techniques for controlling hotspots in high-performance 3D-integrated processors
K Puttaswamy, GH Loh - 2007 IEEE 13th International …, 2007 - ieeexplore.ieee.org
3D integration technology greatly increases transistor density while providing faster on-chip
communication. 3D implementations of processors can simultaneously provide both latency …
communication. 3D implementations of processors can simultaneously provide both latency …
Power and performance of read-write aware hybrid caches with non-volatile memories
Caches made of non-volatile memory technologies, such as magnetic RAM (MRAM) and
phase-change RAM (PRAM), offer dramatically different power-performance characteristics …
phase-change RAM (PRAM), offer dramatically different power-performance characteristics …
BioSEAL: In-memory biological sequence alignment accelerator for large-scale genomic data
Genome sequences contain hundreds of millions of DNA base pairs. Finding the degree of
similarity between two genomes requires executing a compute-intensive dynamic …
similarity between two genomes requires executing a compute-intensive dynamic …
Energy-and performance-aware scheduling of tasks on parallel and distributed systems
Enabled by high-speed networking in commercial, scientific, and government settings, the
realm of high performance is burgeoning with greater amounts of computational and storage …
realm of high performance is burgeoning with greater amounts of computational and storage …
Charon: A Secure Cloud-of-Clouds System for Storing and Sharing Big Data
We present Charon, a cloud-backed storage system capable of storing and sharing big data
in a secure, reliable, and efficient way using multiple cloud providers and storage …
in a secure, reliable, and efficient way using multiple cloud providers and storage …
Performance and scaling behavior of bioinformatic applications in virtualization environments to create awareness for the efficient use of compute resources
The large amount of biological data available in the current times, makes it necessary to use
tools and applications based on sophisticated and efficient algorithms, developed in the …
tools and applications based on sophisticated and efficient algorithms, developed in the …