Conflict-based cache attacks can allow an adversary to infer the access pattern of a co-
running application by orchestrating evictions via cache conflicts. Such attacks can be …

Historically, improvement in GPU performance has been tightly coupled with transistor
scaling. As Moore's Law slows down, performance of single GPUs may ultimately plateau …

We propose overcoming the memory capacity limitation of GPUs with high-capacity Storage-
Class Memory (SCM) and DRAM cache. By significantly increasing the memory capacity …

Near-Data Processing (NDP) has been a promising architectural paradigm to address the
memory wall challenge for data-intensive applications. Typical NDP systems based on 3D …

Intel Optane memory offers non-volatility, byte addressability, and high capacity. It suits
managed workloads that prefer large main memory heaps. We investigate Optane as the …

Hybrid memory systems are able to achieve both high performance and large capacity when
combining fast commodity DDR memories with larger but slower non-volatile memories in a …

Conventional on-chip TLB hierarchies are unable to fully cover the growing application
working-set sizes. To make things worse, Last-Level TLB (LLT) misses require multiple …

High load latency that results from deep cache hierarchies and relatively slow main memory
is an important limiter of single-thread performance. Data prefetch helps reduce this latency …

The increasing growth of applications' memory capacity and performance demands has led
the CPU vendors to deploy heterogeneous memory systems either within a single system or …

With generational gains from transistor scaling, GPUs have been able to accelerate
traditional computation-intensive workloads. But with the obsolescence of Moore's Law …