Single spacer processes for multiplying pitch by a factor greater than two are provided. In
one embodiment, n, where n≧ 2, tiers of stacked mandrels are formed over a substrate …

The dimensions of mask patterns, such as pitch-multiplied spacers, are controlled by
controlled growth of features in the patterns after they are formed. To form a pattern of pitch …

A method for fabricating a semiconductor device comprises patterning a layer of photoresist
material to form a plurality of mandrels. The method further comprises depositing an oxide …

Methods are disclosed, such as those involving increasing the density of isolated features in
an integrated circuit. Also disclosed are structures associated with the methods. In one or …

Pitch multiplication is performed using a two step process to deposit spacer material on
mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier …

Different sized features in the array and in the periphery of an integrated circuit are patterned
on a substrate in a single step. In particular, a mixed pattern, combining two separately …

Differently-sized features of an integrated circuit are formed by etching a substrate using a
mask which is formed by combining two separately formed patterns. Pitch multiplication is …

US7429536B2 - Methods for forming arrays of small, closely spaced features - Google Patents
US7429536B2 - Methods for forming arrays of small, closely spaced features - Google Patents …

US7396781B2 - Method and apparatus for adjusting feature size and position - Google Patents
US7396781B2 - Method and apparatus for adjusting feature size and position - Google Patents …

Multiple pitch-multiplied spacers are used to form mask patterns having features with
exceptionally small critical dimensions. One of each pair of spacers formed around a …