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A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT ADC With a Single OTA and Second-Order Noise-Sha** SAR Quantizer
This paper presents a compact and power efficient third-order continuous-time (CT) delta-
sigma (ΔΣ) analog-to-digital converter (ADC) with a single operational transconductance …
sigma (ΔΣ) analog-to-digital converter (ADC) with a single operational transconductance …
High resolution and linearity enhanced SAR ADC for wearable sensing systems
This paper presents linearity enhancement capacitor re-configuring technique to improve
the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio …
the Spurious Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio …
Self-dithering technique for high-resolution SAR ADC design
L He, L **, J Yang, F Lin, L Yao… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
In this brief, a high-resolution successive-approximation-register analog-to-digital-
conversion architecture for biomedical data acquisition is proposed. A filtered least …
conversion architecture for biomedical data acquisition is proposed. A filtered least …
A stability-improved single-opamp third-order ΣΔ modulator by using a fully-passive noise-sha** SAR ADC and passive adder
Z Chen, M Miyahara… - … Conference 2016: 42nd …, 2016 - ieeexplore.ieee.org
A stability-improved single operational amplifier third-order ΣΔ modulator by using a fully-
passive noise sha** SAR ADC as a quantizer is presented in this paper. One operational …
passive noise sha** SAR ADC as a quantizer is presented in this paper. One operational …
Capacitor mismatch calibration technique to improve the SFDR of 14-bit SAR ADC
This paper presents mismatch calibration technique to improve the SFDR in a 14-bit
successive approximation register (SAR) analog-to-digital converter (ADC) for wearable …
successive approximation register (SAR) analog-to-digital converter (ADC) for wearable …
An ultra-low-power, 16 bits CT delta-sigma modulator using 4-bit asynchronous SAR quantizer for medical applications
S Javahernia, EN Aghdam… - Journal of Circuits, Systems …, 2020 - World Scientific
In this paper, a low-power second-order feed-forward capacitor-structure continuous-time Δ
Σ modulator with a 4-bit asynchronous successive approximation register (SAR) quantizer is …
Σ modulator with a 4-bit asynchronous successive approximation register (SAR) quantizer is …
A 101 dB SNR fourth-order ΣΔ modulator for MEMS digital geophones
S Li, X Zhao, L Dong, L Yu, X Zhang - AEU-International Journal of …, 2021 - Elsevier
Abstract A fourth-order Σ Δ modulator (SDM) applied for micro-electro-mechanical systems
(MEMS) digital geophones is presented in this paper. At the system stage, the proposed …
(MEMS) digital geophones is presented in this paper. At the system stage, the proposed …
A novel redundant cyclic method to improve the SFDR of SAR ADC
H Fan - Analog Integrated Circuits and Signal Processing, 2016 - Springer
A novel redundant cyclic switching method is proposed for successive approximation
register (SAR) analog-to-digital converter (ADC), the proposed redundant cyclic technique …
register (SAR) analog-to-digital converter (ADC), the proposed redundant cyclic technique …
Low-pass CMOS Sigma-Delta Converter
DD da Fonseca - 2018 - search.proquest.com
The continuing need to provide better health for the population requires the development of
new and better medical devices. Portable devices for the analysis of biological signals, such …
new and better medical devices. Portable devices for the analysis of biological signals, such …
High-Resolution ADCs Design in Image Sensors
H Fan, J Yang, F Maloberti, Q Feng, D Li, D Hu, Y Cen… - 2018 - eprints.gla.ac.uk
This paper presents design considerations for highresolution and high-linearity ADCs for
biomedical imaging applications. The work discusses how to improve dynamic …
biomedical imaging applications. The work discusses how to improve dynamic …