This book is intended to give a general overview of reliability, faults, fault models,
nanotechnology, nanodevices, fault-tolerant architectures and reliability evaluation …

New bottom-up techniques can build silicon nanowires (dimension< 10 nm) that exhibit
remarkable electronic properties, but with current assembly techniques yield very high …

The continued scaling of photolithographic fabrication techniques down to 32 nanometers
and beyond faces enormous technology and economic barriers. Selfassembled devices …

This chapter will start with a brief review of nanoelectronic challenges while focusing on the
reliability challenge. One of the most recent call-to-arms [1] raises two fundamental …

This paper will briefly review nanoelectronic challenges while focusing on reliability. We
shall present and analyze a series of CMOS-based examples for addition starting from the …

This paper presents a method enabling the evaluation of the averaging fault-tolerant
technique, using the output probability density functions of unreliable units that are acquired …

This paper explores low power reliable micro-architectures for addition. Power, speed, and
reliability (both defect-and fault-tolerance) are important metrics of system design, spanning …

Full adder is among the most practical logic blocks. It is the main arithmetical component of
all digital systems. This paper presents the novel design of a high-speed and high-efficient …

The importance of reliability in large distributed systems can not be underestimated.
Considerable effort has been directed towards the development of software reuse. However …

We present a new defect/fault tolerant ultra low power CMOS circuit exploiting low level
redundancy. We show that wiring and transistors may be damaged while the functionality is …