In this paper, we propose a methodology for designing low error efficient approximate
adders for FPGAs. The proposed methodology utilizes FPGA resources efficiently to reduce …

In this paper, an effective and reliable sleep circuit is proposed, which not only reduces
leakage power but also shows significant reduction in ground bounce noise (GBN) in …

This letter presents a novel approximate adder that reduces energy and power consumption
by leveraging a simplified lower-part approximation. The proposed scheme reduces …

Approximate computing is widely used as an efficient method in areas such as digital signal
processing (DSP) and machine learning which are inherently error tolerant. This technique …

Approximate circuit design has gained significance in recent years targeting error-tolerant
applications. In the literature, there have been several attempts at optimizing the number of …

In recent years, approximate circuit design targeting the error‐tolerant applications has
gained significance. In this study, the authors propose a metric that ranks a stand‐alone …

In the field of image processing and computer vision, negative imaging is vital for
applications like medical imaging, art, and data enhancement. This paper introduces an …

This effort sacrificed accuracy in order to design fast, energy-efficient adders. In order to
minimize propagation delay and reduce power consumption, the proposed design truncates …

In the past two decades approximation techniques have been applied at the circuit and
microarchitecture level for exploiting the error-resilient nature of many applications. The …

The compute-intensive multimedia applications on portable devices require power and area
efficient arithmetic units. The adder is a prime building block of these arithmetic units and …