Ultra-low power VLSI circuit design demystified and explained: A tutorial

M Alioto - IEEE Transactions on Circuits and Systems I: Regular …, 2012 - ieeexplore.ieee.org
In this paper, the state of the art in ultra-low power (ULP) VLSI design is presented within a
unitary framework for the first time. A few general principles are first introduced to gain an …

A novel ultra-lightweight multiband rectenna on paper for RF energy harvesting in the next generation LTE bands

V Palazzi, J Hester, J Bito, F Alimenti… - IEEE Transactions …, 2017 - ieeexplore.ieee.org
This paper introduces a novel compact ultralightweight multiband RF energy harvester
fabricated on a paper substrate. The proposed rectenna is designed to operate in all …

A 62 mV 0.13 m CMOS Standard-Cell-Based Design Technique Using Schmitt-Trigger Logic

N Lotze, Y Manoli - IEEE journal of solid-state circuits, 2011 - ieeexplore.ieee.org
Supply voltage reduction beyond the minimum energy per operation point is advantageous
for supply voltage constrained applications, but is limited by the degradation of on-to-off …

Low power design for future wearable and implantable devices

K Lundager, B Zeinali, M Tohidi, JK Madsen… - Journal of low power …, 2016 - mdpi.com
With the fast progress in miniaturization of sensors and advances in micromachinery
systems, a gate has been opened to the researchers to develop extremely small …

Variation tolerant differential 8T SRAM cell for ultralow power applications

S Pal, A Islam - IEEE transactions on computer-aided design of …, 2015 - ieeexplore.ieee.org
Low power and noise tolerant static random access memory (SRAM) cells are in high
demand today. This paper presents a stable differential SRAM cell that consumes low …

Understanding DC behavior of subthreshold CMOS logic through closed-form analysis

M Alioto - IEEE Transactions on Circuits and Systems I: Regular …, 2010 - ieeexplore.ieee.org
In this paper, the DC behavior of subthreshold CMOS logic is analyzed in a closed form for
the first time in the literature. To this aim, simplified large-signal and small-signal models of …

SleepWalker: A 25-MHz 0.4-V Sub- 7- Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes

D Bol, J De Vos, C Hocquet, F Botman… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
Integrated circuits for wireless sensor nodes (WSNs) targeting the Internet-of-Things (IoT)
paradigm require ultralow-power consumption for energy-harvesting operation and low die …

A low-voltage processor for sensing applications with picowatt standby mode

S Hanson, M Seok, YS Lin, ZY Foo… - IEEE Journal of Solid …, 2009 - ieeexplore.ieee.org
Recent progress in ultra-low-power circuit design is creating new opportunities for cubic
millimeter computing. Robust low-voltage operation has reduced active mode power …

Interests and limitations of technology scaling for subthreshold logic

D Bol, R Ambroise, D Flandre… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
Subthreshold logic is an efficient technique to achieve ultralow energy per operation for low-
to-medium throughput applications. In this paper, the interests and limitations of technology …

Characterization of half-select free write assist 9T SRAM cell

S Pal, S Bose, WH Ki, A Islam - IEEE transactions on electron …, 2019 - ieeexplore.ieee.org
Modern biomedical applications have created a high demand for low power static random
access memory (SRAM). In this article, a reliable low power half-select free-write assist 9T …