Scheduling computational and energy harvesting tasks in deadline-aware intermittent systems
The sporadic nature of harvestable energy and the mutually exclusive computing and
charging cycles of intermittently powered batteryless systems pose a unique and …
charging cycles of intermittently powered batteryless systems pose a unique and …
On hardware synthesis and implementation of PLC programs in FPGAs
A Milik - Microprocessors and Microsystems, 2016 - Elsevier
Many processes require controllers with an instant response (eg motor control, CNC
machines). A high-performance PLC can be constructed with use of programmable logic …
machines). A high-performance PLC can be constructed with use of programmable logic …
Reconfigurable Logic Controller—Direct FPGA Synthesis Approach
A Milik, M Kubica, D Kania - Applied Sciences, 2021 - mdpi.com
Featured Application The presented implementation is aimed to deliver high performance
logic controllers with very short and predictable response time. The controller is …
logic controllers with very short and predictable response time. The controller is …
Automatically optimizing the latency, area, and accuracy of c programs for high-level synthesis
Loops are pervasive in numerical programs, so high-level synthesis (HLS) tools use state-of-
the-art scheduling techniques to pipeline them efficiently. Still, the run time performance of …
the-art scheduling techniques to pipeline them efficiently. Still, the run time performance of …
PynqCopter-an open-source FPGA overlay for UAVs
FPGAs are a computing platform that excel in performing signal processing, control,
networking, and security in a high performance and power efficient manner. This makes …
networking, and security in a high performance and power efficient manner. This makes …
[BOOK][B] Scalable and near-optimal design space exploration for embedded systems
A Kritikakou, F Catthoor, C Goutis - 2014 - Springer
The main intention of this book is to propose innovative scalable methodologies, which
support the near-optimal designing and map** process of embedded systems and to …
support the near-optimal designing and map** process of embedded systems and to …
Genetic programming of pipelined datapaths for FPGA
A new method of the pipelined datapath synthesis which is based on the genetic
programming approach is proposed. The method is based on the representation of the …
programming approach is proposed. The method is based on the representation of the …
An efficient dynamic scheduling of tasks for multicore real-time systems
K Baital, A Chakrabarti - Advances in computing applications, 2016 - Springer
Embedded real-time systems are increasing day by day to execute high-performance-
oriented applications on multicore architecture. Efficient task scheduling in these systems …
oriented applications on multicore architecture. Efficient task scheduling in these systems …
[BOOK][B] Domain Specific High-Level Synthesis for Cryptographic Workloads
This era is witnessing a phenomenal increase in the amount and frequency of the
information exchange. The imminent Internet of Things paradigm underpins an network of …
information exchange. The imminent Internet of Things paradigm underpins an network of …
XSG-based HLS flow for optimized signal processing designs for FPGAs
This paper proposes an XSG (**linx System Generator) based HLS (High level synthesis)
flow for FPGAs. The tool includes an operation classification process and a formal clustering …
flow for FPGAs. The tool includes an operation classification process and a formal clustering …