In-memory database acceleration on FPGAs: a survey

J Fang, YTB Mulder, J Hidders, J Lee, HP Hofstee - The VLDB Journal, 2020‏ - Springer
While FPGAs have seen prior use in database systems, in recent years interest in using
FPGA to accelerate databases has declined in both industry and academia for the following …

Pushing the level of abstraction of digital system design: A survey on how to program fpgas

ED Sozzo, D Conficconi, A Zeni, M Salaris… - ACM Computing …, 2022‏ - dl.acm.org
Field Programmable Gate Arrays (FPGAs) are spatial architectures with a heterogeneous
reconfigurable fabric. They are state-of-the-art for prototy**, telecommunications …

A survey and evaluation of FPGA high-level synthesis tools

R Nane, VM Sima, C Pilato, J Choi… - … on Computer-Aided …, 2015‏ - ieeexplore.ieee.org
High-level synthesis (HLS) is increasingly popular for the design of high-performance and
energy-efficient heterogeneous systems, shortening time-to-market and addressing today's …

IRONMAN-PRO: Multiobjective design space exploration in HLS via reinforcement learning and graph neural network-based modeling

N Wu, Y **e, C Hao - … on Computer-Aided Design of Integrated …, 2022‏ - ieeexplore.ieee.org
Despite the great success of high-level synthesis (HLS) tools, we observe several
unresolved challenges: 1) the high-level abstraction of HLS programming styles sometimes …

Transformations of high-level synthesis codes for high-performance computing

J de Fine Licht, M Besta, S Meierhans… - IEEE Transactions on …, 2020‏ - ieeexplore.ieee.org
Spatial computing architectures promise a major stride in performance and energy efficiency
over the traditional load/store devices currently employed in large scale computing systems …

A survey on FPGA-based heterogeneous clusters architectures

WF Samayoa, ML Crespo, A Cicuttin, S Carrato - IEEE Access, 2023‏ - ieeexplore.ieee.org
In recent years, the most powerful supercomputers have already reached megawatt power
consumption levels, an important issue that challenges sustainability and shows the …

Reconfigurable architectures: The shift from general systems to domain specific solutions

E D'Arnese, D Conficconi, MD Santambrogio… - … : From Devices to …, 2022‏ - Springer
Reconfigurable computing is an expanding field that, during the last decades, has evolved
from a relatively closed community, where hard skilled developers deployed high …

A survey on performance optimization of high-level synthesis tools

L Huang, DL Li, KP Wang, T Gao, A Tavares - Journal of computer science …, 2020‏ - Springer
Field-programmable gate arrays (FPGAs) have recently evolved as a valuable component of
the heterogeneous computing. The register transfer level (RTL) design flows demand the …

Towards automatic high-level code deployment on reconfigurable platforms: A survey of high-level synthesis tools and toolchains

MW Numan, BJ Phillips, GS Puddy, K Falkner - IEEE Access, 2020‏ - ieeexplore.ieee.org
Heterogeneous computing systems with tightly coupled processors and reconfigurable logic
blocks provide great scope to improve software performance by executing each section of …

Toward a new HLS-based methodology for FPGA benchmarking of candidates in cryptographic competitions: The CAESAR contest case study

E Homsirikamol, KG George - 2017 International Conference …, 2017‏ - ieeexplore.ieee.org
The increasing number of candidates competing in cryptographic contests has made
hardware benchmarking using the traditional Register-Transfer Level (RTL) methodology …