The heterogeneous integration of III–V devices with Si-CMOS on a common Si platform has
shown great promise in the new generations of electrical and optical systems for novel …

We demonstrate Ge0. 95Sn0. 05 p-channel gate-all-around field-effect transistors (p-
GAAFETs) with sub-3 nm nanowire width (W NW) on a GeSn-on-insulator (GeSnOI) …

In this paper, normal incidence vertical pin photodetectors on a germanium-on-insulator
(GOI) platform were demonstrated. The vertical pin structure was realized by ion-implanting …

In this article, we introduce a novel vertical tunneling transistor that uses two germanium
source regions and a T-shaped silicon channel and investigate its performance for low …

We propose the Ge CMOS photonics platform with Ge-on-Insulator (GOI) substrate on which
Ge mid-infrared photonic devices and Ge CMOS transistors can be monolithically integrated …

With the rapid development of 5 G communications, artificial intelligence, the Internet of
Things and other fields, the increasing demand for data transmission in communication …

High quality germanium (Ge) epitaxial film is grown directly on silicon (001) substrate with 6
off-cut using a heavily arsenic (As) doped Ge seed layer. The growth steps consists of (i) …

The integration of III–V semiconductors (eg, GaAs and GaN) and silicon-on-insulator (SOI)-
CMOS on a 200 mm Si substrate is demonstrated. The SOI-CMOS donor wafer is …

A method to remove the misfit dislocations and reduce the threading dislocations density
(TDD) in the germanium (Ge) epilayer growth on a silicon (Si) substrate is presented. The …

Germanium–tin (GeSn) p-channel fin field-effect transistor (p-FinFET) was realized on a
novel GeSn-on-insulator (GeSnOI) substrate. The high-quality GeSnOI substrate was formed …