A 60 GHz frequency generator based on a 20 GHz oscillator and an implicit multiplier

Z Zong, M Babaie… - IEEE Journal of Solid-State …, 2016 - ieeexplore.ieee.org
This paper proposes a mm-wave frequency generation technique that improves its phase
noise (PN) performance and power efficiency. The main idea is that a fundamental 20 GHz …

16.8 A 25.4-to-29.5 GHz 10.2 mW isolated sub-sampling PLL achieving-252.9 dB jitter-power FoM and-63dBc reference spur

Z Yang, Y Chen, S Yang, PI Mak… - 2019 IEEE International …, 2019 - ieeexplore.ieee.org
Recent mm-wave PLLs have explored different architectures to enhance their jitter
performance at low power. Without noisy loop components, the injection-locked PLL in 1 …

A 9.2–12.7 GHz wideband fractional-N subsampling PLL in 28 nm CMOS with 280 fs RMS jitter

K Raczkowski, N Markulic, B Hershberg… - IEEE Journal of Solid …, 2015 - ieeexplore.ieee.org
This paper describes a fractional-N subsampling PLL in 28 nm CMOS. Fractional phase lock
is made possible with almost no penalty in phase noise performance thanks to the use of a …

A low-power low-noise mm-wave subsampling PLL using dual-step-mixing ILFD and tail-coupling quadrature injection-locked oscillator for IEEE 802.11 ad

T Siriburanon, S Kondo, M Katsuragi… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
This paper presents a low-power low-noise 60 GHz frequency synthesizer using a 20 GHz
subsampling phase-locked loop (SS-PLL) and a 60 GHz tail-coupling quadrature injection …

Benchmark figure of merit extensions for low jitter phase locked loops inspired by new PLL architectures

W Bae - IEEE Access, 2022 - ieeexplore.ieee.org
A conventional figure-of-merit (FOM) for a phase-locked loop (PLL) has served as the most
powerful indicator to compare and to normalize performance of different PLL designs …

16.2 A 76fsrms Jitter and –40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage …

J Kim, H Yoon, Y Lim, Y Lee, Y Cho… - … Solid-State Circuits …, 2019 - ieeexplore.ieee.org
The generation of mm-wave (mmW) signals that have ultra-low phase noise (PN) is very
important for the design of RF transceivers (TRXs) for high-data-rate 5G systems. Direct-RF …

17.6 A 21.7-to-26.5 GHz charge-sharing locking quadrature PLL with implicit digital frequency-tracking loop achieving 75fs jitter and− 250dB FoM

Y Hu, X Chen, T Siriburanon, J Du… - … Solid-State Circuits …, 2020 - ieeexplore.ieee.org
Sub-sampling (SS) and injection-locking (IL) techniques are becoming increasingly popular
for 5G millimeter-wave (mmW) frequency generation [1],[2] due to their ability to achieve ultra …

A 2.2 GHz-242 dB-FOM 4.2 mW ADC-PLL using digital sub-sampling architecture

T Siriburanon, S Kondo, K Kimura… - IEEE Journal of Solid …, 2016 - ieeexplore.ieee.org
This paper presents an all-digital phase-locked loop (AD-PLL) using a voltage-domain
digitization realized by an analog-to-digital converter (ADC) instead of adopting a traditional …

A low-integrated-phase-noise 27–30-GHz injection-locked frequency multiplier with an ultra-low-power frequency-tracking loop for mm-wave-band 5G transceivers

S Yoo, S Choi, J Kim, H Yoon, Y Lee… - IEEE Journal of Solid …, 2017 - ieeexplore.ieee.org
An ultra-low-phase-noise injection-locked frequency multiplier (ILFM) for millimeter wave
(mm-wave) fifth-generation transceivers is presented. Using an ultra-low-power frequency …

13.5 A 4-antenna-path beamforming transceiver for 60GHz multi-Gb/s communication in 28nm CMOS

G Mangraviti, K Khalaf, Q Shi, K Vaesen… - … Solid-State Circuits …, 2016 - ieeexplore.ieee.org
Millimeter-Wave transceivers with beamforming capabilities, such as the one presented in
this work, are a key technology to reach 4 or 6Gb/s at 10m range with the IEEE 802.11 ad …