Leveraging negative capacitance CNTFETs for image processing: An ultra-efficient ternary image edge detection hardware

F Behbahani, MKQ Jooq, MH Moaiyeri… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
Recently, integrating ferroelectric materials with nanotransistors such as carbon nanotube
field-effect transistors (CNTFETs) has opened new doors for demonstrating a new …

An SEU-hardened ternary SRAM design based on efficient ternary C-elements using CNTFET technology

V Bakhtiary, A Amirany, MH Moaiyeri, K Jafari - Microelectronics Reliability, 2023 - Elsevier
Ternary logic has been investigated for several years as it can provide substantial
advantages in reducing the complexity of operations and the number of interconnects. On …

Hybrid cmos-pcm ternary logic for digital circuit applications

M Kumar, M Suri - IEEE Transactions on Nanotechnology, 2023 - ieeexplore.ieee.org
This paper presents hybrid design of a Ternary Inverter (TI) circuit by integrating an Ovonic-
Threshold-Switching (OTS) based Phase-Change-Memory (PCM) cell between …

Optimizing ternary multiplier design with fast ternary adder

J Yoon, S Baek, S Kim, S Kang - IEEE Transactions on Circuits …, 2022 - ieeexplore.ieee.org
Existing ternary multiplier designs are difficult to use in ternary systems. Thus, ternary
Wallace tree multipliers that reduce the number of transistors by using 4-input ternary adders …

Energy-quality scalable design space exploration of approximate FFT hardware architectures

PTL Pereira, PÜL da Costa… - … on Circuits and …, 2022 - ieeexplore.ieee.org
This paper presents a comprehensive design space exploration for boosting energy
efficiency of a fast Fourier transform (FFT) VLSI accelerator, exploiting several approximate …

TPCSA-MRAM: Ternary Precharge Sense Amplifier-Based MRAM

MM Mazaheri, A Amirany, MH Moaiyeri - IEEE Access, 2024 - ieeexplore.ieee.org
The emerging multi-value logic technology in memory systems has increased data storage
capacity and power efficiency. In this paper, to address the power consumption challenge of …

VLSI Architectures of Approximate Arithmetic Units Applied to Parallel Sensors Calibration

MMA da Rosa, PÜL da Costa… - … on Circuits and …, 2023 - ieeexplore.ieee.org
Approximate computing maximizes area and energy savings for a trade-off between quality
and efficiency. Approximate arithmetic operators have emerged as an efficient alternative to …

High Efficiency Multiply-Accumulator Using Ternary Logic and Ternary Approximate Algorithm

W Wen, G Zhao, W Hu, Z Li, X Wang… - … on Circuits and …, 2024 - ieeexplore.ieee.org
A multiply-accumulator, often abbreviated as a MAC unit, is central to a multitude of
computational tasks, particularly those tasks (such as neural networks) involving array …

Crosstalk delay and noise optimization in nanoscale multi-line interconnects based on repeater staggering in ternary logic

SG Hamedani, MH Moaiyeri - … Journal of Solid State Science and …, 2021 - iopscience.iop.org
In this study, the crosstalk effects are minimized in coupled multi-line wires based on
repeater staggering in ternary logic. For more accuracy, the impact of the coupling …

Approximate Ternary Matrix Multiplication for Image Processing and Neural Networks

LH Krishna, B Srinivasu - 2024 IEEE Computer Society Annual …, 2024 - ieeexplore.ieee.org
This paper presents a Carbon Nanotube FET-based ternary matrix multiplication using
systolic array architecture for applications towards ternary neural networks and image …