Design of Low Power and Robust Asynchronous SRAM Generated Using AMC Involving SAHB Circuit with QDI Logic

BK Vinay, SP Mala, SV Panchami - Journal of The Institution of Engineers …, 2024 - Springer
In the contemporary era, achieving enhanced performance in application-specific integrated
circuit (ASIC) designs necessitates the development of memory circuits with minimal latency …

Efficient implementation of a Content-Addressable Memory in a 22nm technology

A Torrubia Ollero - 2023 - upcommons.upc.edu
Memory design is a key aspect of a digital processing system. Usually, memories take a
considerable amount of space which on a design size limited ASIC, it can be a problem …