The year 2011 marked an important transition for FPGA high-level synthesis (HLS), as it
went from prototy** to deployment. A decade later, in this article, we assess the progress …

Field Programmable Gate Arrays (FPGAs) are spatial architectures with a heterogeneous
reconfigurable fabric. They are state-of-the-art for prototy**, telecommunications …

We show that DNN accelerator micro-architectures and their program map**s represent
specific choices of loop order and hardware parallelism for computing the seven nested …

Stencil computation is one of the most important kernels in many application domains such
as image processing, solving partial differential equations, and cellular automata. Many of …

We present Calyx, a new intermediate language (IL) for compiling high-level programs into
hardware designs. Calyx combines a hardware-like structural language with a software-like …

With the pursuit of improving compute performance under strict power constraints, there is
an increasing need for deploying applications to heterogeneous hardware architectures with …

Image processing is becoming an increasingly important domain for many applications on
workstations and the datacenter that require accelerators for high performance and energy …

Spatial computing architectures promise a major stride in performance and energy efficiency
over the traditional load/store devices currently employed in large scale computing systems …

FPGAs have been proven to be powerful computational accelerators across many types of
workloads. The mainstream programming approach is high level synthesis (HLS), which …

Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications
with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) …