Complete hardware evolution based SoPC for evolvable hardware

A Swarnalatha, AP Shanthi - Applied soft computing, 2014 - Elsevier
Evolvable hardware (EH) is a thriving area of research which uses the genetic algorithm
(GA) to construct novel circuits without manual engineering. These algorithms have been …

A three-step decomposition method for the evolutionary design of sequential logic circuits

H Liang, W Luo, X Wang - Genetic Programming and Evolvable Machines, 2009 - Springer
Evolvable hardware (EHW) refers to an automatic circuit design approach, which employs
evolutionary algorithms (EAs) to generate the configurations of the programmable devices …

Generalized disjunction decomposition for the evolution of programmable logic array structures

E Stomeo, T Kalganova… - First NASA/ESA …, 2006 - ieeexplore.ieee.org
Evolvable hardware refers to a self reconfigurable electronic circuit, where the circuit
configuration is under the control of an evolutionary algorithm. Evolvable hardware has …

Desired footprint by technology map** modification using a genetic algorithm in Odin II

SA Damghani, JP Legault… - … International Workshop on …, 2020 - ieeexplore.ieee.org
Technology map** is the transformation of a general Boolean logic network into a
functional equivalent K-LUT network that can be implemented by the target FPGA device …

GA evolved CGP configuration data for digital circuit design on embryonic architecture

G Malhotra, P Duraiswamy - International Journal of Hybrid …, 2023 - journals.sagepub.com
Embryonic architecture that carries self-evolving design with fault tolerant feature is
proposed for deep space missions. Fault tolerance is achieved in the embryonic architecture …

Circuit design optimization using genetic algorithm with parameterized uniform crossover

Z Bao, T Watanabe - IEICE transactions on fundamentals of …, 2010 - search.ieice.org
Evolvable hardware (EHW) is a new research field about the use of Evolutionary Algorithms
(EAs) to construct electronic systems. EHW refers in a narrow sense to use evolutionary …

Reliability enhancement of digital combinational circuits based on evolutionary approach

SJS Mahdavi, K Mohammadi - Microelectronics Reliability, 2010 - Elsevier
Reliability has become an integral part of the system design process, especially for those
systems with life-critical applications such as aircrafts and spacecraft flight control. The …

Genetic algorithms and artificial neural networks to combinational circuit generation on reconfigurable hardware

BA Silva, MA Dias, JL Silva… - … Computing and FPGAs, 2010 - ieeexplore.ieee.org
Operating in critical environments is an extremely desired feature for fault-tolerant
embedded systems. In addition, due to design test and validation complexity of these …

A stepwise dimension reduction approach to evolutionary design of relative large combinational logic circuits

Z Li, W Luo, X Wang - Evolvable Systems: From Biology to Hardware: 8th …, 2008 - Springer
In this paper, a stepwise dimension reduction (SDR) approach to evolutionary design of
relatively large combinational logic circuits is proposed. The proposed method divides the …

GA Evolved Configuration Data for Embryonic Architecture with Built-in Self-test

G Malhotra, P Duraiswamy, JK Kishore - International Conference on …, 2022 - Springer
The embryonic architecture, which draws inspiration from the biological process of
ontogeny, has built-in capabilities for self-repair. The embryonic cells have a complete …