Deterrent: detecting trojans using reinforcement learning
Insertion of hardware Trojans (HTs) in integrated circuits is a pernicious threat. Since HTs
are activated under rare trigger conditions, detecting them using random logic simulations is …
are activated under rare trigger conditions, detecting them using random logic simulations is …
Mabfuzz: Multi-armed bandit algorithms for fuzzing processors
As the complexities of processors keep increasing, the task of effectively verifying their
integrity and security becomes ever more daunting. The intricate web of instructions …
integrity and security becomes ever more daunting. The intricate web of instructions …
An Automated Fault Attack Framework for Block Ciphers Through Property Mining and Verification
X Wang, W Hu, S Tang, X Wang… - IEEE Transactions on …, 2024 - ieeexplore.ieee.org
Fault attacks are effective side-channel attack methods for cryptanalysis. However, existing
fault attack methods involve manual derivation of complex fault models or computation …
fault attack methods involve manual derivation of complex fault models or computation …
LLMs for Hardware Security: Boon or Bane?
Large language models (LLMs) have emerged as transformative tools within the hardware
design and verification lifecycle, offering numerous capabilities in accelerating design …
design and verification lifecycle, offering numerous capabilities in accelerating design …