A hardware design language for timing-sensitive information-flow security
Information security can be compromised by leakage via low-level hardware features. One
recently prominent example is cache probing attacks, which rely on timing channels created …
recently prominent example is cache probing attacks, which rely on timing channels created …
Qif-verilog: Quantitative information-flow based hardware description languages for pre-silicon security assessment
Hardware vulnerabilities are often due to design mistakes because the designer does not
sufficiently consider potential security vulnerabilities at the design stage. As a result, various …
sufficiently consider potential security vulnerabilities at the design stage. As a result, various …
Secure information flow verification with mutable dependent types
This paper presents a novel secure hardware description language (HDL) that uses an
information flow type system to ensure that hardware is secure at design time. The novelty of …
information flow type system to ensure that hardware is secure at design time. The novelty of …
The mechanized marriage of effects and monads with applications to high-assurance hardware
TN Reynolds, A Procter, WL Harrison… - ACM Transactions on …, 2019 - dl.acm.org
Constructing high-assurance, secure hardware remains a challenge, because to do so
relies on both a verifiable means of hardware description and implementation. However …
relies on both a verifiable means of hardware description and implementation. However …
Language–Based Techniques for Building Timing Channel Secure Hardware–Software Systems
D Zagieboylo - 2023 - search.proquest.com
We rely on a deep stack of abstractions to efficiently build software applications without
having to completely understand the nuance of language runtimes, operating systems, and …
having to completely understand the nuance of language runtimes, operating systems, and …
[PDF][PDF] Lightweight verification of secure hardware isolation through static information flow analysis (technical report)
Hardware-based mechanisms for software isolation are becoming increasingly popular, but
implementing these mechanisms correctly has proved difficult, undermining the root of …
implementing these mechanisms correctly has proved difficult, undermining the root of …
A core calculus for secure hardware: its formal semantics and proof system
TN Reynolds, A Procter, WL Harrison… - Proceedings of the 15th …, 2017 - dl.acm.org
Constructing high assurance, secure hardware remains a challenge, because to do so relies
on both a verifiable means of hardware description and implementation. However …
on both a verifiable means of hardware description and implementation. However …
Timing-Safe Hardware-Level Information Flow Control
A Ferraiuolo - 2018 - search.proquest.com
Develo** secure processors has become increasingly important. Recent advancements in
commercial security architectures such as Intel SGX have garnered much attention. The …
commercial security architectures such as Intel SGX have garnered much attention. The …
[BOOK][B] Hardware Trustworthiness Verification and Assessment: From a Formal Method Perspective
X Guo - 2019 - search.proquest.com
The exponential growth of the integrated circuit (IC) industry results in the rapid globalization
of its supply chain. Since a complicated IC design often involves numerous IP suppliers …
of its supply chain. Since a complicated IC design often involves numerous IP suppliers …