[KNJIGA][B] Network-on-chip: the next generation of system-on-chip integration

S Kundu, S Chattopadhyay - 2014 - library.oapen.org
Addresses the Challenges Associated with System-on-Chip Integration Network-on-Chip:
The Next Generation of System-on-Chip Integration examines the current issues restricting …

Fuzzy-based map** algorithms to design networks-on-chip

M Taassori, S Niroomand, S Uysal… - Journal of Intelligent …, 2016 - content.iospress.com
Abstract Network on Chip (NoC) has been suggested as an appropriate and scalable
solution for System on Chip (SoC) architectures having high communication demands. In …

Area-performance trade-off in floorplan generation of Application-Specific Network-on-Chip with soft cores

J Soumya, S Tiwary, S Chattopadhyay - Journal of Systems Architecture, 2015 - Elsevier
Abstract Application-Specific Network-on-Chip (ASNoC) synthesis has found increasing
significance in develo** System-on-Chip (SoC) solutions for applications. This paper …

Converting Interfaces on Application-specific Network-on-chip

K Han, JJ Lee, W Lee - JSTS: Journal of Semiconductor …, 2017 - koreascience.kr
As mobile systems are performing various functionality in the IoT (Internet of Things) era,
network-on-chip (NoC) plays a pivotal role to support communication between the tens and …

Synergistic Floorplanning and Routing Topology Co-design for Application-Specific NoC Synthesis

S Liu, M Radetzki - 2024 IEEE 17th International Symposium on …, 2024 - ieeexplore.ieee.org
Network-on-Chip (NoC) offers a promising solution for on-chip communication in highly
integrated System-on-Chips (SoCs). NoCs can be designed with either regular or …

Butterfly-Fat-Tree topology based fault-tolerant Network-on-Chip design using particle swarm optimisation

PV Bhanu, PV Kulkarni - Journal of Experimental & Theoretical …, 2019 - Taylor & Francis
As the technology is scaling down more number of processing elements are integrated on to
a single chip, namely system-on-chips (SoCs). Using traditional bus architecture in SoCs …

Aging-resilient topology synthesis of heterogeneous manycore network-on-chip using genetic algorithm with flexible number of routers

YS Lee, SY Kim, TH Han - Electronics, 2019 - mdpi.com
As semiconductor processes enter the nanoscale, system-on-chip (SoC) interconnects suffer
from link aging owing to negative bias temperature instability (NBTI), hot carrier injection …

Area Constrained Performance Optimized ASNoC Synthesis with Thermal‐aware White Space Allocation and Redistribution

P Mukherjee, S D'souza, S Chattopadhyay - Integration, 2018 - Elsevier
Abstract Application-Specific Network-on-Chip (ASNoC) has emerged as a more efficient
design alternative to the regular Network-on-Chip (NoC) topologies, which can better suit …

Communication centric floorplanning of NoC based system on chip

JT John, N Dahare, B Chaithanya, J Reuben - Procedia Computer Science, 2016 - Elsevier
In the past, shared bus based architecture was used as a communication architecture in
SoC. They consume more area, power and do not meet the proper bandwidth requirement …

Thermal-aware task allocation and scheduling for periodic real-time applications in mesh-based heterogeneous NoCs

P Mukherjee, K Jain, S Chattopadhyay - Real-Time Systems, 2019 - Springer
With continuous technology scaling, the power density and hence the temperature of
Network-on-Chip (NoC) may increase rapidly. This in-turn degrades the performance of the …