(57) ABSTRACT A video coding device includes processor (s) configured to determine, for
each of a plurality of bins of a value for a syntax element of a current transform coeficient …

Bross, B., et al., High Efficiency Video Coding (HEVC) text specification draft 10 (for FDIS &
Last Call), Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and …

Innovations in video decoding and rendering operations in a graphics pipeline, in which at
least some of the operations are performed using a graphics processing unit (" GPU”), are …

Innovations in video decoding and rendering operations for inter-coded blocks in a graphics
pipeline, in which at least some of the operations are performed using a graphics processing …

Abstract Systems, methods, and instrumentalities are disclosed for parallel decoding of a
layered video stream. A base layer video stream and an enhancement layer video stream …

A video coding device includes a memory configured to store video data and processor (s)
configured to process at least a portion of the stored video data. The processor (s) are …

Context adaptive binary arithmetic coding (CABAC) techniques are generally described.
Aspects of the techniques are generally directed to inheritance-based context initialization …

An interleaved multi-layered video data stream with inter leaved decoding units of different
layers is provided with further timing control information in addition to the timing control …

(57) ABSTRACT A signaling of at least one characteristic for layers of a multi-layered video
signal such as, for example, for each layer the indication of dependent layers to which the …

The present disclosure relates to an image encoding device and a method, and an image
decoding device and a method that are designed to improve encoding efficiency in IntraBC …