A state of the art on ADC modelling
The state of the art of the research on modelling of analog-to-digital converter (ADC)-based
measuring devices is surveyed. Main topics of modelling are reviewed according to the …
measuring devices is surveyed. Main topics of modelling are reviewed according to the …
[BUCH][B] Oversampled delta-sigma modulators: Analysis, applications and novel topologies
The analysis of the quantization noise in delta-sigma modulators is not a trivial task. State-of-
the-art analysis methods include modelling the quantization noise as a uniform distributed …
the-art analysis methods include modelling the quantization noise as a uniform distributed …
A Time-Interleaved 2nd-Order ΔΣ Modulator Achieving 5-MHz Bandwidth and 86.1-dB SNDR Using Digital Feed-Forward Extrapolation
This article presents a time-interleaved (TI) 2nd-order discrete-time (DT) delta-sigma
modulator (DSM). We propose a digital feed-forward extrapolation by first digitizing the …
modulator (DSM). We propose a digital feed-forward extrapolation by first digitizing the …
A time-interleaved continuous-time/spl Delta//spl Sigma/modulator with 20-MHz signal bandwidth
TC Caldwell, DA Johns - IEEE Journal of Solid-State Circuits, 2006 - ieeexplore.ieee.org
This paper presents the first implementation results for a time-interleaved continuous-time
DeltaSigma modulator. The derivation of the time-interleaved continuous-time DeltaSigma …
DeltaSigma modulator. The derivation of the time-interleaved continuous-time DeltaSigma …
A power-efficient two-channel time-interleaved ΣΔ modulator for broadband applications
A two-channel time-interleaved second-order sigma-delta modulator for broadband
applications including asymmetrical digital subscriber line (ADSL) is presented. The …
applications including asymmetrical digital subscriber line (ADSL) is presented. The …
A wideband sigma-delta modulator with cross-coupled two-paths
E Bilhan, F Maloberti - … Transactions on Circuits and Systems I …, 2009 - ieeexplore.ieee.org
The performance of a sigma-delta analog-to-digital converter (ADC) critically depends on
one or more of the main three parameters: over-sampling ratio, the order of the modulators …
one or more of the main three parameters: over-sampling ratio, the order of the modulators …
Time-interleaved sigma-delta modulator using output prediction scheme
KS Lee, F Maloberti - … Transactions on Circuits and Systems II …, 2004 - ieeexplore.ieee.org
A time-interleaved sigma-delta modulator using the output prediction scheme is proposed.
This approach uses only one integrator channel along with incomplete integrator output …
This approach uses only one integrator channel along with incomplete integrator output …
A Time-Interleaved -DAC Architecture Clocked at the Nyquist Rate
J Pham, AC Carusone - … Transactions on Circuits and Systems II …, 2008 - ieeexplore.ieee.org
This paper describes a delta-sigma (DeltaSigma) digital-to-analog converter (DAC)
architecture that combines a polyphase decomposition of the interpolation filter and a time …
architecture that combines a polyphase decomposition of the interpolation filter and a time …
[BUCH][B] Modeling, identification, and compensation of channel mismatch errors in time-interleaved analog-to-digital converters
C Vogel - 2005 - academia.edu
Modern signal processing applications emerging in telecommunication and instrumentation
industries need high-speed analog-to-digital converters (ADCs), which can be achieved by …
industries need high-speed analog-to-digital converters (ADCs), which can be achieved by …
A novel two-channel continuous-time time-interleaved 3rd-order sigma-delta modulator with integrator-sharing topology
This paper presents a 3rd-order two-path continuous-time time-interleaved (CTTI) delta-
sigma modulator which is implemented in standard 90 nm CMOS technology. The …
sigma modulator which is implemented in standard 90 nm CMOS technology. The …