Design and performance optimization of junctionless bottom spacer FinFET for digital/analog/RF applications at sub-5nm technology node

S Valasa, KV Ramakrishna, N Vadthiya… - ECS Journal of Solid …, 2023 - iopscience.iop.org
Design and Performance Optimization of Junctionless Bottom Spacer FinFET for Digital/Analog/RF
Applications at Sub-5nm Technology Node - IOPscience Skip to content IOP Science home …

Performance analysis of dielectrically separated independent gates junctionless DG-MOSFET: a digital perspective

N Guduri, D Kannuri, RR Maram… - 2022 IEEE …, 2022 - ieeexplore.ieee.org
Metal oxide semiconductor field effect transistors (MOSFET) have been downscaled in
response to the growing need for small, battery-operated semiconductor devices. However …

Design considerations into circuit applications for structurally optimised FinFET

K Sarangam, S Valasa, PK Mudidhe… - ECS Journal of Solid …, 2023 - iopscience.iop.org
FinFETs have gained a lot of demand in the family of multigate FET devices in the recent
years. In this view, this manuscript aims to design different FinFET architectures to observe …

Design of Novel Phase Frequency Detectors for Low Phase Noise Frequency Multipliers

AV Nishchal, KS Vasistha, LSS Sharma… - 2024 15th …, 2024 - ieeexplore.ieee.org
Phase frequency detectors (PFDs), which are utilized in Delay Locked Loops (DLLs) and
Phase Locked Loops (PLLs), are an essential component of any frequency synthesizer …

Investigation of Thermal Performance on Conventional and Junctionless Nanosheet Field Effect Transistors

S Valasa, S Tayal, LR Thoutam - Advanced Ultra Low‐Power …, 2023 - Wiley Online Library
The analog/RF properties of any device are temperature dependent. Due to a wide range of
temperature‐sensitive electronic applications including those in the military, nuclear …

High Operating Frequency, Low-Power PFD for PLL Applications

P Trivedi, BB Tiwari - 2023 14th International Conference on …, 2023 - ieeexplore.ieee.org
This research introduces a novel sequential type Phase-Frequency Detector (PFD) that is
appropriate for low-power and high-frequency PLL applications. This PFD uses a modified …

Performance analysis of temperature on wireless performance for vertically stacked junctionless nanosheet field effect transistor

S Valasa, S Tayal, LR Thoutam - … of EEDCS Workshop Held in Conjunction …, 2023 - Springer
This paper investigates the effect of temperature on the wireless performance
characteristics, ie, linearity and harmonic distortion for the vertically stacked junctionless …

Investigation of high-K dielectrics for single-and multi-gate FETs

S Valasa, S Tayal, LR Thoutam - Advanced MOS Devices and …, 2024 - taylorfrancis.com
The continuous drive to enhance semiconductor performance has led to significant
advancements in MOSFETs. As device miniaturization approaches its fundamental limits …

Impact of Channel Thickness on the Performance of JL-DG MOSFET based NAND, NOR, and NOT Logic Gates

S Katharashala, S Gandla, V Bommineni… - 2022 IEEE …, 2022 - ieeexplore.ieee.org
The ever-increasing demand for portable electronic devices has led to the downscaling of
metal oxide semiconductor (MOS) field effect transistors (FETs). However, the downscaling …

Current Mirror based Level Shifter aiding multitudinous conversion ranges

PL Kiran, KS Pratheek, M Sathvika… - … on Integrated Circuits …, 2024 - ieeexplore.ieee.org
A System on a Chip (SoC) is a condensed integrated circuit that combines all crucial
components of an entire system onto a single chip. Due to the diverse operating voltage …