Turnitin
降AI改写
早检测系统
早降重系统
Turnitin-UK版
万方检测-期刊版
维普编辑部版
Grammarly检测
Paperpass检测
checkpass检测
PaperYY检测
The current status and the future prospects of surface passivation in 4H-SiC transistors
The degraded performance of 4H-SiC transistors due to a high density of the SiC/SiO 2
interface states (D IT)(~ 10 12-10 13 eV-1 cm-2) has gained increasing attention in recent …
interface states (D IT)(~ 10 12-10 13 eV-1 cm-2) has gained increasing attention in recent …
Interfacial study and energy-band alignment of annealed Al2O3 films prepared by atomic layer deposition on 4H-SiC
F Zhang, G Sun, L Zheng, S Liu, B Liu, L Dong… - Journal of Applied …, 2013 - pubs.aip.org
Al 2 O 3 films were prepared by atomic layer deposition using trimethylaluminum and H 2 O
at 250 C on 4H-SiC substrates and annealed at 1000 C in N 2. The as-deposited and …
at 250 C on 4H-SiC substrates and annealed at 1000 C in N 2. The as-deposited and …
Electrical Characteristics of SiO2 Deposited by Atomic Layer Deposition on 4H–SiC After Nitrous Oxide Anneal
Properties of SiO 2 gate dielectric deposited by atomic layer deposition (ALD) on Si-face of
4H silicon carbide (SiC) were systematically studied. The interface state and effective fixed …
4H silicon carbide (SiC) were systematically studied. The interface state and effective fixed …
[HTML][HTML] The improvement of atomic layer deposited SiO2/4H-SiC interfaces via a high temperature forming gas anneal
This letter reports on the improvement of a SiO 2 layer formed by atomic layer deposition on
4H-SiC, using a post-deposition anneal in forming gas ambient. Capacitance–voltage …
4H-SiC, using a post-deposition anneal in forming gas ambient. Capacitance–voltage …
Lowering of interface state density between deposited gate oxide and SiC substrate via controlling substrate oxidation
The quality of oxide/semiconductor interface in SiC gate stacks is engineered by employing
atomic layer deposition of gate oxide and controlling post-deposition annealing (PDA) under …
atomic layer deposition of gate oxide and controlling post-deposition annealing (PDA) under …
[HTML][HTML] Electron irradiation effects and room-temperature annealing mechanisms for SiC MOSFETs
M He, P Dong, Y Ma, Q Yu, S Cao, W Huang, Q Xu… - Results in Physics, 2024 - Elsevier
In this work, the electron irradiation effects and post-irradiation annealing (PIA) response on
SiC MOSFETs were investigated and analyzed in terms of the evolution of oxide-and …
SiC MOSFETs were investigated and analyzed in terms of the evolution of oxide-and …
Low-temperature re-oxidation of near-interface defects and voltage stability in SiC MOS capacitors
Z Yin, C Yang, F Zhang, Y Su, F Qin, D Wang - Applied Surface Science, 2020 - Elsevier
We proposed a solution to improve the interface property and voltage instability of silicon
carbide metal–oxide–semiconductor (SiC MOS) capacitors by eliminating near-interface …
carbide metal–oxide–semiconductor (SiC MOS) capacitors by eliminating near-interface …
High Mobility 4H-SiC Lateral MOSFETs Using Lanthanum Silicate and Atomic Layer Deposited SiO2
We report high mobility Si-face 4H-SiC MOSFET results via a novel interface engineering
technique using a gate-stack consisting of lanthanum silicate (LaSiO x) and atomic layer …
technique using a gate-stack consisting of lanthanum silicate (LaSiO x) and atomic layer …
Influences of pre-oxidation nitrogen implantation and post-oxidation annealing on channel mobility of 4H-SiC MOSFETs
C Fei, S Bai, Q Wang, R Huang, Z He, H Liu… - Journal of Crystal …, 2020 - Elsevier
Detailed investigations on the pre-oxidation nitrogen implantation and post-oxidation
annealing processes for the improvement of channel mobility and specific on-resistance in …
annealing processes for the improvement of channel mobility and specific on-resistance in …
TEOS-based low-pressure chemical vapor deposition for gate oxides in 4H–SiC MOSFETs using nitric oxide post-deposition annealing
JH Moon, IH Kang, HW Kim, O Seok, W Bahng… - Current Applied …, 2020 - Elsevier
The use of SiO 2/4H–SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) can
be problematic due to high interface state density (D it) and low field-effect mobility (μ fe) …
be problematic due to high interface state density (D it) and low field-effect mobility (μ fe) …