Sparse linear algebra includes the fundamental and important operations in various large-
scale scientific computing and real-world applications. There exists performance bottleneck …

Using high-level synthesis techniques, this paper proposes an adaptable high-performance
streaming dataflow engine for sparse matrix dense vector multiplication (SpMV) suitable for …

FPGAs allow custom memory hierarchy and flexible data movement with highly fine-grained
control. These capabilities are critical for building high performance and energy efficient …

Sparse matrix–matrix multiplication (SpMM) is an important kernel in multiple areas, eg, data
analytics and machine learning. Due to the low on-chip memory requirement, the consistent …

Sparse matrix-vector multiplication (SpMV) is of paramount importance in both scientific and
engineering applications. The main workload of SpMV is multiplications between randomly …

Sparse matrix–vector multiplication (SpMV) on FPGAs has gained much attention. The
performance of SpMV is mainly determined by the number of multiplications between …

In this paper, we present hardware accelerators created with high-level synthesis
techniques for sparse and dense matrix multiplication operations. The cores can operate …

Sparse Matrix-Vector Multiplication (SpMV) is the most important sparse linear algebra
kernel in both scientific and engineering applications. Due to its irregular control flow and …

The peak performance of any SpMV depends primarily on the available memory bandwidth
and its effective use. GPUs, ASICs, and new FPGAs have higher and higher bandwidth; …

High-Level Synthesis (HLS) tools have the capability of creating register-transfer level from
high-level specifications by not degrading the performance. OpenCL framework uses HLS …