The Partitioned Global Address Space (PGAS) model is a parallel programming model that
aims to improve programmer productivity while at the same time aiming for high …

We describe the design and implementation of FaRM, a new main memory distributed
computing platform that exploits RDMA to improve both latency and throughput by an order …

Innovations in hardware architecture, such as hyper-threading or multicore processors,
make parallel computing resources available for computer systems in different areas …

This paper evaluates the suitability of the MapReduce model for multi-core and multi-
processor systems. MapReduce was created by Google for application development on data …

Writing applications that benefit from the massive computational power of future multicore
chip multiprocessors will not be an easy task for mainstream programmers accustomed to …

The first comprehensive presentation of reduction semantics in one volume, and the first tool
set for such forms of semantics. This text is the first comprehensive presentation of reduction …

We present Sequoia, a programming language designed to facilitate the development of
memory hierarchy aware parallel programs that remain portable across modern machines …

Recent advancements in high-performance networking interconnect significantly narrow the
performance gap between intra-node and inter-node communications, and open up …

This paper proposes a compiler-based programming framework that automatically translates
user-written structured grid code into scalable parallel implementation code for GPU …

In this paper we propose the Merge framework, a general purpose programming model for
heterogeneous multi-core systems. The Merge framework replaces current ad hoc …