Programming and synthesis for software-defined FPGA acceleration: status and future prospects
FPGA-based accelerators are increasingly popular across a broad range of applications,
because they offer massive parallelism, high energy efficiency, and great flexibility for …
because they offer massive parallelism, high energy efficiency, and great flexibility for …
Review of neural network model acceleration techniques based on FPGA platforms
F Liu, H Li, W Hu, Y He - Neurocomputing, 2024 - Elsevier
Neural network models, celebrated for their outstanding scalability and computational
capabilities, have demonstrated remarkable performance across various fields such as …
capabilities, have demonstrated remarkable performance across various fields such as …
High-level synthesis design space exploration: Past, present, and future
BC Schafer, Z Wang - … on Computer-Aided Design of Integrated …, 2019 - ieeexplore.ieee.org
This article presents a survey of the different modern high-level synthesis (HLS) design
space exploration (DSE) techniques that have been proposed so far to automatically …
space exploration (DSE) techniques that have been proposed so far to automatically …
Scalehls: A new scalable high-level synthesis framework on multi-level intermediate representation
High-level synthesis (HLS) has been widely adopted as it significantly improves the
hardware design productivity and enables efficient design space exploration (DSE). Existing …
hardware design productivity and enables efficient design space exploration (DSE). Existing …
Allo: A programming model for composable accelerator design
Special-purpose hardware accelerators are increasingly pivotal for sustaining performance
improvements in emerging applications, especially as the benefits of technology scaling …
improvements in emerging applications, especially as the benefits of technology scaling …
AutoDSE: Enabling software programmers to design efficient FPGA accelerators
Adopting FPGA as an accelerator in datacenters is becoming mainstream for customized
computing, but the fact that FPGAs are hard to program creates a steep learning curve for …
computing, but the fact that FPGAs are hard to program creates a steep learning curve for …
IronMan-Pro: Multiobjective design space exploration in HLS via reinforcement learning and graph neural network-based modeling
Despite the great success of high-level synthesis (HLS) tools, we observe several
unresolved challenges: 1) the high-level abstraction of HLS programming styles sometimes …
unresolved challenges: 1) the high-level abstraction of HLS programming styles sometimes …
Rosetta: A realistic high-level synthesis benchmark suite for software programmable FPGAs
Modern high-level synthesis (HLS) tools greatly reduce the turn-around time of designing
and implementing complex FPGA-based accelerators. They also expose various …
and implementing complex FPGA-based accelerators. They also expose various …
IRONMAN GNN-assisted Design Space Exploration in High-Level Synthesis via Reinforcement Learning
Despite the great success of High-Level Synthesis (HLS) tools, we observe several
unresolved challenges: 1) the high-level abstraction of programming styles in HLS conceals …
unresolved challenges: 1) the high-level abstraction of programming styles in HLS conceals …
Fast and accurate estimation of quality of results in high-level synthesis with machine learning
While high-level synthesis (HLS) offers sophisticated techniques to optimize designs for
area and performance, HLS-estimated resource usage and timing often deviate significantly …
area and performance, HLS-estimated resource usage and timing often deviate significantly …