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Adaptive estimation of memory cell read thresholds
N Sommer, O Shalvi, U Perlmutter, O Golov… - US Patent …, 2013 - Google Patents
4,661,929 4,768,171 4,811.285 4,899,342 4,910,706 4,993,029 5,056,089 5,077,722
5,126,808 5,163,021 5,172,338 5, 182.558 5, 182,752 5, 191584 5,200,959 5,237,535 …
5,126,808 5,163,021 5,172,338 5, 182.558 5, 182,752 5, 191584 5,200,959 5,237,535 …
Managing non-volatile media
R Wood, J Hyun, H Sun - US Patent 8,661,184, 2014 - Google Patents
Primary Examiner—Trong Phan (74) Attorney, Agent, or Firm—Kunzler Law Group, PC
continuation-in-part of application No. 13/015,458,(57) ABSTRACT filed on Jan. 27, 2011 …
continuation-in-part of application No. 13/015,458,(57) ABSTRACT filed on Jan. 27, 2011 …
Systems and methods for averaging error rates in non-volatile devices and storage systems
H Weingarten - US Patent 8,730,729, 2014 - Google Patents
G11C 11/34(2006.01)(57) ABSTRACT G11C 16/04(2006.01)[1041, 1/20(200601) A system
for storing a plurality of logical pages in a set of at (52) us CL least one? ash device, each …
for storing a plurality of logical pages in a set of at (52) us CL least one? ash device, each …
Efficient readout from analog memory cells using data compression
U Perlmutter, D Sokolov, O Shalvi, O Golov - US Patent 8,230,300, 2012 - Google Patents
(57) ABSTRACT A method for data storage includes storing data in a group of analog
memory cells by writing respective input storage val ues to the memory cells in the group …
memory cells by writing respective input storage val ues to the memory cells in the group …
Reliable data storage in analog memory cells in the presence of temperature variations
O Shalvi - US Patent 7,773,413, 2010 - Google Patents
5,237,535 5,272.669 5,276,649 5,388,064 5,416,782 5,473,753 5,479, 170 5,508,958
5,519,831 5,541,886 5,600,677 5,657,332 5,675,540 5,696,717 5,726,649 5,742,752 …
5,519,831 5,541,886 5,600,677 5,657,332 5,675,540 5,696,717 5,726,649 5,742,752 …
Combined distortion estimation and error correction coding for memory devices
A method for operating a memory device (24) includes US 2009/OO24. 905 A1 Jan. 22,
2009 encoding data using an Error Correction Code (ECC) and Related US Application …
2009 encoding data using an Error Correction Code (ECC) and Related US Application …
Flash memory apparatus and methods using a plurality of decoding stages including optional use of concatenated BCH codes and/or designation of “first below” cells
H Weingarten, S Levy, M Katz - US Patent 8,335,977, 2012 - Google Patents
US8335977B2 - Flash memory apparatus and methods using a plurality of decoding stages
including optional use of concatenated BCH codes and/or designation of “first below” cells …
including optional use of concatenated BCH codes and/or designation of “first below” cells …
Parameter estimation based on error correction code parity check equations
N Sommer - US Patent 8,156,398, 2012 - Google Patents
3,668,631 A 6/1972 Grif? th etal. 3,668,632 A 6/1972 Oldham 4,058,851 A 11/1977
Scheuneman 4,112,502 A 9/1978 Scheuneman 4,394,763 A 7/1983 Nagano et a1 …
Scheuneman 4,112,502 A 9/1978 Scheuneman 4,394,763 A 7/1983 Nagano et a1 …
Memory device with internal signap processing unit
D Sokolov, N Sommer, O Shalvi… - US Patent 8,429,493, 2013 - Google Patents
(57) ABSTRACT A method for operating a memory (36) includes storing data in a plurality of
analog memory cells (40) that are fabricated on a first semiconductor die by writing input …
analog memory cells (40) that are fabricated on a first semiconductor die by writing input …
Distortion estimation and cancellation in memory devices
(57) ABSTRACT A method for operating a memory (28) includes storing data in a group of
analog memory cells (32) of the memory as respective first Voltage levels. After storing the …
analog memory cells (32) of the memory as respective first Voltage levels. After storing the …