Hardware information flow tracking

W Hu, A Ardeshiricham, R Kastner - ACM Computing Surveys (CSUR), 2021 - dl.acm.org
Information flow tracking (IFT) is a fundamental computer security technique used to
understand how information moves through a computing system. Hardware IFT techniques …

{CellIFT}: Leveraging cells for scalable and precise dynamic information flow tracking in {RTL}

F Solt, B Gras, K Razavi - 31st USENIX Security Symposium (USENIX …, 2022 - usenix.org
Dynamic Information Flow Tracking (dynamic IFT) is a well-known technique with many
security applications such as analyzing the behavior of a system given an input and …

VeriSketch: Synthesizing secure hardware designs with timing-sensitive information flow properties

A Ardeshiricham, Y Takashima, S Gao… - Proceedings of the 2019 …, 2019 - dl.acm.org
We present VeriSketch, a security-oriented program synthesis framework for develo**
hardware designs with formal guarantee of functional and security specifications. VeriSketch …

Clepsydra: Modeling timing flows in hardware designs

A Ardeshiricham, W Hu… - 2017 IEEE/ACM …, 2017 - ieeexplore.ieee.org
Emergence of side channel security attacks has challenged the classic assumptions
regarding what data is publicly available. As demonstrated repeatedly, statistical analysis of …

Isadora: Automated information flow property generation for hardware designs

C Deutschbein, A Meza, F Restuccia… - Proceedings of the 5th …, 2021 - dl.acm.org
Isadora is a methodology for creating information flow specifications of hardware designs.
The methodology combines information flow tracking and specification mining to produce a …

Transys: Leveraging common security properties across hardware designs

R Zhang, C Sturton - 2020 IEEE Symposium on Security and …, 2020 - ieeexplore.ieee.org
This paper presents Transys, a tool for translating security critical properties written for one
hardware design to analogous properties suitable for a second design. Transys works in …

[HTML][HTML] Understanding multidimensional verification: Where functional meets non-functional

X Lai, A Balakrishnan, T Lange, M Jenihhin… - Microprocessors and …, 2019 - Elsevier
Advancements in electronic systems' design have a notable impact on design verification
technologies. The recent paradigms of Internet-of-Things (IoT) and Cyber-Physical Systems …

Towards multidimensional verification: Where functional meets non-functional

M Jenihhin, X Lai, T Ghasempouri… - 2018 IEEE Nordic …, 2018 - ieeexplore.ieee.org
Trends in advanced electronic systems' design have a notable impact on design verification
technologies. The recent paradigms of Internet-of-Things (IoT) and CyberPhysical Systems …

The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice

Y Chen, X Cui, X Cui, X Zhang - Microelectronics Journal, 2024 - Elsevier
Abstract The Gate Level Information Flow Tracking (GLIFT) is an effective method to uphold
the information security for high-assurance digital circuits. The GLIFT method associates a …

Gate Level Information Flow analysis for multi-valued logic system

Y Tai, W Hu, L Guo, B Mao, D Mu - 2017 2nd International …, 2017 - ieeexplore.ieee.org
As the scale of integrated circuits continuously increasing, guaranteeing intensity of testing
and coverage rate of verification in the design phase absolutely is becoming severe …