ePlace-3D: Electrostatics based placement for 3D-ICs

J Lu, H Zhuang, I Kang, P Chen… - Proceedings of the 2016 on …, 2016‏ - dl.acm.org
We propose a flat, analytic, mixed-size placement algorithm ePlace-3D for three-dimension
integrated circuits (3D-ICs) using nonlinear optimization. Our contributions are (1) …

On the deployment of on-chip noise sensors

T Wang, C Zhang, J **ong, Y Shi - IEEE Transactions on …, 2014‏ - ieeexplore.ieee.org
Runtime noise management systems can enforce power integrity without significantly
increasing design margins. These systems typically respond to on-chip noise sensors to …

On the optimal threshold voltage computation of on-chip noise sensors

T Wang, C Zhang, J **ong, PW Luo… - … on Computer-Aided …, 2015‏ - ieeexplore.ieee.org
Runtime noise management systems typically rely on on-chip noise sensors to accurately
capture voltage emergencies. As such, the threshold voltage for noise sensors to report …

1-bit compressed sensing based framework for built-in resonance frequency prediction using on-chip noise sensors

T Wang, J Liu, C Zhuo, Y Shi - 2015 IEEE/ACM International …, 2015‏ - ieeexplore.ieee.org
Significant noise will occur when the load currents of a chip contain frequency components
that are close to its resonance frequency, which is mainly decided by power delivery network …