Ultra-low power VLSI circuit design demystified and explained: A tutorial
M Alioto - IEEE Transactions on Circuits and Systems I: Regular …, 2012 - ieeexplore.ieee.org
In this paper, the state of the art in ultra-low power (ULP) VLSI design is presented within a
unitary framework for the first time. A few general principles are first introduced to gain an …
unitary framework for the first time. A few general principles are first introduced to gain an …
An injectable 64 nW ECG mixed-signal SoC in 65 nm for arrhythmia monitoring
A syringe-implantable electrocardiography (ECG) monitoring system is proposed. The noise
optimization and circuit techniques in the analog front-end (AFE) enable 31 nA current …
optimization and circuit techniques in the analog front-end (AFE) enable 31 nA current …
A 65 nm Sub- Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter
Aggressive supply voltage scaling to below the device threshold voltage provides significant
energy and leakage power reduction in logic and SRAM circuits. Consequently, it is a …
energy and leakage power reduction in logic and SRAM circuits. Consequently, it is a …
A 0.2 V, 480 kb subthreshold SRAM with 1 k cells per bitline for ultra-low-voltage computing
A 2 muW, 100 kHz, 480 kb subthreshold SRAM operating at 0.2 V is demonstrated in a 130
nm CMOS process. A 10-T SRAM cell allows 1 k cells per bitline by eliminating the data …
nm CMOS process. A 10-T SRAM cell allows 1 k cells per bitline by eliminating the data …
Ultralow-voltage, minimum-energy CMOS
S Hanson, B Zhai, K Bernstein… - IBM journal of …, 2006 - ieeexplore.ieee.org
Energy efficiency has become a ubiquitous design requirement for digital circuits.
Aggressive supply-voltage scaling has emerged as the most effective way to reduce energy …
Aggressive supply-voltage scaling has emerged as the most effective way to reduce energy …
Energy-efficient subthreshold processor design
Subthreshold circuits have drawn a strong interest in recent ultralow power research. In this
paper, we present a highly efficient subthreshold microprocessor targeting sensor …
paper, we present a highly efficient subthreshold microprocessor targeting sensor …
SleepWalker: A 25-MHz 0.4-V Sub- 7- Microcontroller in 65-nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes
Integrated circuits for wireless sensor nodes (WSNs) targeting the Internet-of-Things (IoT)
paradigm require ultralow-power consumption for energy-harvesting operation and low die …
paradigm require ultralow-power consumption for energy-harvesting operation and low die …
Interests and limitations of technology scaling for subthreshold logic
Subthreshold logic is an efficient technique to achieve ultralow energy per operation for low-
to-medium throughput applications. In this paper, the interests and limitations of technology …
to-medium throughput applications. In this paper, the interests and limitations of technology …
Nanometer MOSFET variation in minimum energy subthreshold circuits
N Verma, J Kwong… - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
Minimum energy operation for digital circuits typically requires scaling the power supply
below the device threshold voltage. Advanced technologies offer improved integration …
below the device threshold voltage. Advanced technologies offer improved integration …
Variation-driven device sizing for minimum energy sub-threshold circuits
J Kwong, AP Chandrakasan - … of the 2006 international symposium on …, 2006 - dl.acm.org
Sub-threshold operation is a compelling approach for energy-constrained applications, but
increased sensitivity to variation must be mitigated. We explore variability metrics and the …
increased sensitivity to variation must be mitigated. We explore variability metrics and the …