Nomad:{Non-Exclusive} Memory Tiering via Transactional Page Migration

L **ang, Z Lin, W Deng, H Lu, J Rao, Y Yuan… - … USENIX Symposium on …, 2024 - usenix.org
With the advent of byte-addressable memory devices, such as CXL memory, persistent
memory, and storage-class memory, tiered memory systems have become a reality. Page …

Memtis: Efficient memory tiering with dynamic page classification and page size determination

T Lee, SK Monga, C Min, YI Eom - … of the 29th Symposium on Operating …, 2023 - dl.acm.org
The evergrowing memory demand fueled by datacenter workloads is the driving force
behind new memory technology innovations (eg, NVM, CXL). Tiered memory is a promising …

{FlexMem}: Adaptive page profiling and migration for tiered memory

D Xu, J Ryu, K Shin, P Su, D Li - 2024 USENIX Annual Technical …, 2024 - usenix.org
Tiered memory, combining multiple memory components with different performance and
capacity, provides a cost-effective solution to increase memory capacity and improve …

Demystifying cxl memory with genuine cxl-ready systems and devices

Y Sun, Y Yuan, Z Yu, R Kuper, C Song… - Proceedings of the 56th …, 2023 - dl.acm.org
The ever-growing demands for memory with larger capacity and higher bandwidth have
driven recent innovations on memory expansion and disaggregation technologies based on …

[PDF][PDF] Managing Memory Tiers with CXL in Virtualized Environments

Y Zhong, DS Berger, C Waldspurger… - … on Operating Systems …, 2024 - symbioticlab.org
Cloud providers seek to deploy CXL-based memory to increase aggregate memory
capacity, reduce costs, and lower carbon emissions. However, CXL accesses incur higher …

Tiered Memory Management: Access Latency is the Key!

M Vuppalapati, R Agarwal - Proceedings of the ACM SIGOPS 30th …, 2024 - dl.acm.org
The emergence of tiered memory architectures has led to a renewed interest in memory
management. Recent works on tiered memory management innovate on mechanisms for …

A case against cxl memory pooling

P Levis, K Lin, A Tai - Proceedings of the 22nd ACM Workshop on Hot …, 2023 - dl.acm.org
Compute Express Link (CXL) is a replacement for PCIe. With much lower latency than PCIe
and hardware support for cache coherence, programs can efficiently access remote memory …

Harvesting Memory-bound {CPU} Stall Cycles in Software with {MSH}

Z Luo, S Son, S Ratnasamy, S Shenker - 18th USENIX Symposium on …, 2024 - usenix.org
Memory-bound stalls account for a significant portion of CPU cycles in datacenter
workloads, which makes harvesting them to execute other useful work highly valuable …

[PDF][PDF] ExtMEM: enabling Application-Aware virtual memory management for Data-Intensive applications

S Jalalian, S Patel, MR Hajidehi, M Seltzer… - 2024 USENIX annual …, 2024 - researchgate.net
For over forty years, researchers have demonstrated that operating system memory
managers often fall short in supporting memory-hungry applications. The problem is even …

MTM: Rethinking Memory Profiling and Migration for Multi-Tiered Large Memory

J Ren, D Xu, J Ryu, K Shin, D Kim, D Li - Proceedings of the Nineteenth …, 2024 - dl.acm.org
Multi-terabyte large memory systems are often characterized by more than two memory tiers
with different latency and bandwidth. Multi-tiered large memory systems call for rethinking of …