This article presents a synthesizable digital low-dropout regulator (DLDO) that precludes the
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …

In this article, we present Catena, a near-threshold voltage 16-core programmable spatial
array accelerator supporting workloads for ultralow-power (ULP) mobile and embedded …

We present domain adaptive processor (), a programmable systolic-array processor
designed for wireless communication and linear algebra workloads. uses a globally …

This paper presents a novel spiking neural network (SNN) classifier architecture for enabling
always-on artificial intelligent (AI) functions, such as keyword spotting (KWS) and visual …

Emerging sub-mW near-threshold-voltage system-on-chips require new power management
architecture that can create multiple voltage domains with the fewest possible off-chip …

This article presents a technique titled metastability condition detection and correction
(MEDAC) that is featured in a near-threshold voltage (NTV) network-on-chip (NoC) …

Emerging embedded systems, such as autonomous robots/vehicles, demand a new system-
on-a-chip (SoC) that is ultra-low power (mW or even sub-mW level) but highly robust. Such …

With the application of low-power design technologies such as dynamic voltage and
frequency scaling (DVFS) and globally asynchronous locally synchronization (GALS), a …

Hardware accelerators are emerging. Prompted by the demise of Dennard's scaling,
computer architects aim to bridge the gap between the increasing computational demands …

Deep learning has become the algorithm of choice in many applications like face
recognition, object detection, speech recognition, etc. because of superior accuracy. Large …