The state explosion problem remains a major hurdle in applying symbolic model checking to
large hardware designs. State space abstraction, having been essential for verifying designs …

Although model checking is an exhaustive formal verification method, a bug can still escape
detection if the erroneous behavior does not violate any verified property. We propose a …

We present Ketchum, a tool that was developed to improve the productivity of simulation-
based functional verification by providing two capabilities:(1) automatic test generation and …

Functional verification is widely acknowledged as a major bottleneck in microprocessor
design. While early work on specification driven functional test program generation has …

Functional validation is a major bottleneck in pipelined processor design due to the
combined effects of increasing design complexity and lack of efficient techniques for directed …

Bounded model checking has received recent attention as an efficient verification method.
The basic idea behind this new method is to reduce the model checking problem to the …

Functional verification of microprocessors is one of the most complex and expensive tasks in
the current system-on-chip design methodology. Simulation using functional test vectors is …

Functional validation is a major bottleneck in pipelined processor design. Simulation using
functional test vectors is the most widely used form of processor validation. While existing …

Formal techniques offer an opportunity to significantly reduce the cost of microprocessor
verification. We propose a model checking based approach to automatically generate …

One aspect of the invention is a coverage metric to identify that part of a state space Which is
covered by properties veri? ed by model checking. In each property, a signal is identi? ed (or …