A survey of accelerator architectures for deep neural networks
Recently, due to the availability of big data and the rapid growth of computing power,
artificial intelligence (AI) has regained tremendous attention and investment. Machine …
artificial intelligence (AI) has regained tremendous attention and investment. Machine …
Research progress on memristor: From synapses to computing systems
As the limits of transistor technology are approached, feature size in integrated circuit
transistors has been reduced very near to the minimum physically-realizable channel length …
transistors has been reduced very near to the minimum physically-realizable channel length …
Trustworthy ai: A computational perspective
In the past few decades, artificial intelligence (AI) technology has experienced swift
developments, changing everyone's daily life and profoundly altering the course of human …
developments, changing everyone's daily life and profoundly altering the course of human …
PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference
Memristor crossbars are circuits capable of performing analog matrix-vector multiplications,
overcoming the fundamental energy efficiency limitations of digital logic. They have been …
overcoming the fundamental energy efficiency limitations of digital logic. They have been …
ISAAC: A convolutional neural network accelerator with in-situ analog arithmetic in crossbars
A Shafiee, A Nag, N Muralimanohar… - ACM SIGARCH …, 2016 - dl.acm.org
A number of recent efforts have attempted to design accelerators for popular machine
learning algorithms, such as those involving convolutional and deep neural networks (CNNs …
learning algorithms, such as those involving convolutional and deep neural networks (CNNs …
Pipelayer: A pipelined reram-based accelerator for deep learning
Convolution neural networks (CNNs) are the heart of deep learning applications. Recent
works PRIME [1] and ISAAC [2] demonstrated the promise of using resistive random access …
works PRIME [1] and ISAAC [2] demonstrated the promise of using resistive random access …
[HTML][HTML] Analog architectures for neural network acceleration based on non-volatile memory
Analog hardware accelerators, which perform computation within a dense memory array,
have the potential to overcome the major bottlenecks faced by digital hardware for data …
have the potential to overcome the major bottlenecks faced by digital hardware for data …
Computing in memory with spin-transfer torque magnetic RAM
In-memory computing is a promising approach to addressing the processor-memory data
transfer bottleneck in computing systems. We propose spin-transfer torque compute-in …
transfer bottleneck in computing systems. We propose spin-transfer torque compute-in …
GraphR: Accelerating graph processing using ReRAM
Graph processing recently received intensive interests in light of a wide range of needs to
understand relationships. It is well-known for the poor locality and high memory bandwidth …
understand relationships. It is well-known for the poor locality and high memory bandwidth …
Scaledeep: A scalable compute architecture for learning and evaluating deep networks
Deep Neural Networks (DNNs) have demonstrated state-of-the-art performance on a broad
range of tasks involving natural language, speech, image, and video processing, and are …
range of tasks involving natural language, speech, image, and video processing, and are …