dSVM: energy-efficient distributed scratchpad video memory architecture for the next-generation high efficiency video coding
An energy-efficient distributed Scratchpad Video Memory Architecture (dSVM) for the next-
generation parallel High Efficiency Video Coding is presented. Our dSVM combines private …
generation parallel High Efficiency Video Coding is presented. Our dSVM combines private …
Dynamic and adaptive SPM management for a multi-task environment
W Ji, N Deng, F Shi, Q Zuo, J Li - Journal of Systems Architecture, 2011 - Elsevier
In this paper, we present a dynamic and adaptive scratchpad memory (SPM) management
strategy targeting a multi-task environment. It can be applied to a contemporary embedded …
strategy targeting a multi-task environment. It can be applied to a contemporary embedded …
A new block motion vector estimation using adaptive pixel decimation
YL Chan, WC Siu - 1995 International Conference on Acoustics …, 1995 - ieeexplore.ieee.org
Block motion estimation is being widely used in video coding. A new adaptive technique
based on pixel decimation for estimating motion vector is presented. In the traditional …
based on pixel decimation for estimating motion vector is presented. In the traditional …
A semi-automatic scratchpad memory management framework for CMP
N Deng, W Ji, J Li, Q Zuo - … , APPT 2011, Shanghai, China, September 26 …, 2011 - Springer
Previous research has demonstrated that scratchpad memory (SPM) consumes far less
power and on-chip area than the traditional cache. As a software managed memory, SPM …
power and on-chip area than the traditional cache. As a software managed memory, SPM …
[PDF][PDF] Automated Compilation Framework for Scratchpad-based Real-Time Systems.
MRS Soliman - 2019 - uwspace.uwaterloo.ca
ScratchPad Memory (SPM) is highly adopted in real-time systems as it exhibits a predictable
behaviour. SPM is software-managed by explicitly inserting instructions to move code and …
behaviour. SPM is software-managed by explicitly inserting instructions to move code and …
Data Compression and Re-computation Based Performance Improvement in Multi-Core Architectures
H Koc, M Garlapati, PP Madupu - 2020 10th Annual Computing …, 2020 - ieeexplore.ieee.org
In this paper, we present an approach to improve performance of multi-core embedded
architectures utilizing on-chip software-managed memory. The proposed approach targets …
architectures utilizing on-chip software-managed memory. The proposed approach targets …
The study of hierarchical branch prediction architecture
W **, J Dong, K Lu, Y Li - 2011 14th IEEE International …, 2011 - ieeexplore.ieee.org
Branch prediction is critical to the instruction-level parallelism. Researchers have been
focusing on branch direction algorithm for a long time and recent improvement on the …
focusing on branch direction algorithm for a long time and recent improvement on the …
State of art innovative technique for management of scratchpad memory (scratch)
Software-managed scratchpad memory (Scratch) is a type of SRAM, small in size but
comparatively fast. Compared with cache, Scratch inspired the programmer having benefits …
comparatively fast. Compared with cache, Scratch inspired the programmer having benefits …
Core working set based scratchpad memory management
N Deng, W Ji, J Li, Q Zuo, F Shi - IEICE TRANSACTIONS on …, 2011 - search.ieice.org
Many state-of-the-art embedded systems adopt scratch-pad memory (SPM) as the main on-
chip memory due to its advantages in terms of energy consumption and on-chip area. The …
chip memory due to its advantages in terms of energy consumption and on-chip area. The …
[PDF][PDF] Leveraging Scratchpad Memory in a Hierarchical Architecture for Multicore
K Tabbassum, SF Khahro, S Shaikh, FN Issani… - 2024 - researchgate.net
The objective of this paper is to introduce a innovative architecture tailored for multi-core
processors, aimed at enabling high-performance parallel computing. The proposed …
processors, aimed at enabling high-performance parallel computing. The proposed …