Data center energy consumption modeling: A survey

M Dayarathna, Y Wen, R Fan - IEEE Communications surveys …, 2015 - ieeexplore.ieee.org
Data centers are critical, energy-hungry infrastructures that run large-scale Internet-based
services. Energy consumption models are pivotal in designing and optimizing energy …

VTR 7.0: Next generation architecture and CAD system for FPGAs

J Luu, J Goeders, M Wainberg, A Somerville… - ACM Transactions on …, 2014 - dl.acm.org
Exploring architectures for large, modern FPGAs requires sophisticated software that can
model and target hypothetical devices. Furthermore, research into new CAD algorithms …

FPGA architecture: Survey and challenges

I Kuon, R Tessier, J Rose - Foundations and Trends® in …, 2008 - nowpublishers.com
Abstract Field-Programmable Gate Arrays (FPGAs) have become one of the key digital
circuit implementation media over the last decade. A crucial part of their creation lies in their …

High-level power estimation techniques in embedded systems hardware: an overview

M Richa, JC Prévotet, M Dardaillon, M Mroué… - The Journal of …, 2023 - Springer
Power optimization has become a major concern for most digital hardware designers,
particularly in early design phases and especially in limited power budget systems (battery …

3-D nFPGA: A reconfigurable architecture for 3-D CMOS/nanomaterial hybrid digital circuits

C Dong, D Chen, S Haruehanroengra… - IEEE Transactions on …, 2007 - ieeexplore.ieee.org
In this paper, we introduce a novel reconfigurable architecture, named 3D field-
programmable gate array (3D nFPGA), which utilizes 3D integration techniques and new …

RAM-Jam: Remote temperature and voltage fault attack on FPGAs using memory collisions

MM Alam, S Tajik, F Ganji… - 2019 Workshop on …, 2019 - ieeexplore.ieee.org
It has been demonstrated that with concrete hardware Trojans, a remote adversary can
mount physical attacks, eg, fault or side-channel attacks, against adjacent IP cores in an …

Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture

C Dong, D Chen, S Tanachutiwat… - 2007 IEEE/ACM …, 2007 - ieeexplore.ieee.org
In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which
utilizes 3D integration techniques and new nanoscale materials synergistically. The …

mrFPGA: A novel FPGA architecture with memristor-based reconfiguration

J Cong, B **ao - 2011 IEEE/ACM international symposium on …, 2011 - ieeexplore.ieee.org
In this paper, we introduce a novel FPGA architecture with memristor-based reconfiguration
(mrFPGA). The proposed architecture is based on the existing CMOS-compatible memristor …

FPGA design automation: A survey

D Chen, J Cong, P Pan - Foundations and Trends® in …, 2006 - nowpublishers.com
Abstract Design automation or computer-aided design (CAD) for field programmable gate
arrays (FPGAs) has played a critical role in the rapid advancement and adoption of FPGA …

Power wasting circuits for cloud FPGA attacks

G Provelengios, D Holcomb… - 2020 30th International …, 2020 - ieeexplore.ieee.org
Recent research has exposed a number of security issues related to the use of FPGAs in
cloud computing environments. Circuits that deliberately waste power can be carefully …