A survey of architectural techniques for improving cache power efficiency
S Mittal - Sustainable Computing: Informatics and Systems, 2014 - Elsevier
Modern processors are using increasingly larger sized on-chip caches. Also, with each
CMOS technology generation, there has been a significant increase in their leakage energy …
CMOS technology generation, there has been a significant increase in their leakage energy …
Managing cache coherency in a data processing apparatus
US PATENT DOCUMENTS 6,272.520 B1 8/2001 Sharangpani et al. 6,338,123 B2* 1/2002
Joseph et al.................. 711/144 6,704,845 B2* 3/2004 Anderson et al.............. 711.146 …
Joseph et al.................. 711/144 6,704,845 B2* 3/2004 Anderson et al.............. 711.146 …
Unison cache: A scalable and effective die-stacked DRAM cache
Recent research advocates large die-stacked DRAM caches in many core servers to break
the memory latency and bandwidth wall. To realize their full potential, die-stacked DRAM …
the memory latency and bandwidth wall. To realize their full potential, die-stacked DRAM …
Caches and hash trees for efficient memory integrity verification
We study the hardware cost of implementing hash-tree based verification of untrusted
external memory by a high performance processor. This verification could enable …
external memory by a high performance processor. This verification could enable …
The ZCache: Decoupling ways and associativity
The ever-increasing importance of main memory latency and bandwidth is pushing CMPs
towards caches with higher capacity and associativity. Associativity is typically improved by …
towards caches with higher capacity and associativity. Associativity is typically improved by …
A highly configurable cache architecture for embedded systems
Energy consumption is a major concern in many embedded computing systems. Several
studies have shown that cache memories account for about 50% of the total energy …
studies have shown that cache memories account for about 50% of the total energy …
[PDF][PDF] Way-predicting set-associative cache for high performance and low energy consumption
On-chip cache has been playing an important role in achieving high memory performance
and low energy consumption, because it can reduce the number of access to slower and …
and low energy consumption, because it can reduce the number of access to slower and …
The V-Way cache: demand-based associativity via global replacement
MK Qureshi, D Thompson… - … Symposium on Computer …, 2005 - ieeexplore.ieee.org
As processor speeds increase and memory latency becomes more critical, intelligent design
and management of secondary caches becomes increasingly important. The efficiency of …
and management of secondary caches becomes increasingly important. The efficiency of …
Reducing set-associative cache energy via way-prediction and selective direct-map**
Set-associative caches achieve low miss rates for typical applications but result in significant
energy dissipation. Set-associative caches minimize access time by probing all the data …
energy dissipation. Set-associative caches minimize access time by probing all the data …
Energy-driven integrated hardware-software optimizations using SimplePower
With the emergence of a plethora of embedded and portable applications, energy
dissipation has joined throughput, area, and accuracy/precision as a major design …
dissipation has joined throughput, area, and accuracy/precision as a major design …