A survey of architectural techniques for improving cache power efficiency

S Mittal - Sustainable Computing: Informatics and Systems, 2014 - Elsevier
Modern processors are using increasingly larger sized on-chip caches. Also, with each
CMOS technology generation, there has been a significant increase in their leakage energy …

Managing cache coherency in a data processing apparatus

E Özer, SD Biles, SA Ford - US Patent 7,937,535, 2011 - Google Patents
US PATENT DOCUMENTS 6,272.520 B1 8/2001 Sharangpani et al. 6,338,123 B2* 1/2002
Joseph et al.................. 711/144 6,704,845 B2* 3/2004 Anderson et al.............. 711.146 …

Unison cache: A scalable and effective die-stacked DRAM cache

D Jevdjic, GH Loh, C Kaynak… - 2014 47th Annual IEEE …, 2014 - ieeexplore.ieee.org
Recent research advocates large die-stacked DRAM caches in many core servers to break
the memory latency and bandwidth wall. To realize their full potential, die-stacked DRAM …

Caches and hash trees for efficient memory integrity verification

B Gassend, GE Suh, D Clarke… - … Symposium on High …, 2003 - ieeexplore.ieee.org
We study the hardware cost of implementing hash-tree based verification of untrusted
external memory by a high performance processor. This verification could enable …

The ZCache: Decoupling ways and associativity

D Sanchez, C Kozyrakis - 2010 43rd Annual IEEE/ACM …, 2010 - ieeexplore.ieee.org
The ever-increasing importance of main memory latency and bandwidth is pushing CMPs
towards caches with higher capacity and associativity. Associativity is typically improved by …

A highly configurable cache architecture for embedded systems

C Zhang, F Vahid, W Najjar - … of the 30th annual international symposium …, 2003 - dl.acm.org
Energy consumption is a major concern in many embedded computing systems. Several
studies have shown that cache memories account for about 50% of the total energy …

[PDF][PDF] Way-predicting set-associative cache for high performance and low energy consumption

K Inoue, T Ishihara, K Murakami - … on Low power electronics and design, 1999 - dl.acm.org
On-chip cache has been playing an important role in achieving high memory performance
and low energy consumption, because it can reduce the number of access to slower and …

The V-Way cache: demand-based associativity via global replacement

MK Qureshi, D Thompson… - … Symposium on Computer …, 2005 - ieeexplore.ieee.org
As processor speeds increase and memory latency becomes more critical, intelligent design
and management of secondary caches becomes increasingly important. The efficiency of …

Reducing set-associative cache energy via way-prediction and selective direct-map**

MD Powell, A Agarwal, TN Vijaykumar… - … . 34th ACM/IEEE …, 2001 - ieeexplore.ieee.org
Set-associative caches achieve low miss rates for typical applications but result in significant
energy dissipation. Set-associative caches minimize access time by probing all the data …

Energy-driven integrated hardware-software optimizations using SimplePower

N Vijaykrishnan, M Kandemir, MJ Irwin… - ACM SIGARCH …, 2000 - dl.acm.org
With the emergence of a plethora of embedded and portable applications, energy
dissipation has joined throughput, area, and accuracy/precision as a major design …