Compact and efficient structure of 8-bit S-box for lightweight cryptography

B Rashidi - Integration, 2021 - Elsevier
In this paper, we design an inversion-based S-box with better hardware implementation than
the AES S-box with similar cryptographic properties. The proposed S-box computation …

Lightweight Cryptographic S-Boxes Based on Efficient Hardware Structures for Block Ciphers.

B Rashidi - ISeCure, 2023 - search.ebscohost.com
This paper presents four low-cost substitution boxes (S-boxes), including two 4-bit S-boxes
called S< sub> 1 and S< sub> 2 and two 8-bit S-boxes called SB< sub> 1 and SB< sub> 2 …

Lightweight S-box architecture for secure internet of things

A Prathiba, VSK Bhaaskaran - Information, 2018 - mdpi.com
Lightweight cryptographic solutions are required to guarantee the security of Internet of
Things (IoT) pervasiveness. Cryptographic primitives mandate a non-linear operation. The …

Preventing DoS attacks in IoT using AES

Y Javed, AS Khan, A Qahar… - … , Electronic and Computer …, 2017 - jtec.utem.edu.my
Abstract The Internet of Things (IoT) is significant in today's development of mobile networks
enabling to obtain information from the environment, devices, and appliances. A number of …

Circuit and system design for optimal lightweight AES encryption on FPGA

MM Wong, DML Wong, C Zhang, I Hijazin - 2018 - dr.ntu.edu.sg
The substitution box (or commonly termed as S-Box) is a non-linear transformation, and
known as the bottleneck of the overall operation in AES cipher. Due to recent emergence of …

Lightweight 8‐bit S‐box and combined S‐box/S‐box−1 for cryptographic applications

B Rashidi - International Journal of Circuit Theory and …, 2021 - Wiley Online Library
In this paper, a lightweight 8‐bit S‐box and combined S‐box/S‐box− 1 with a security level
equal to the AES S‐box is presented. From the viewpoint of hardware implementation, the S …

Hardware footprints of S-box in lightweight symmetric block ciphers for IoT and CPS information security systems

A Prathiba, VSK Bhaaskaran - Integration, 2019 - Elsevier
The hardware footprint for S-box specification in lightweight block cipher as appropriate to
IoT and CPS information security systems is presented in this paper. The S-box Boolean …

Low‐power secure S‐box circuit using charge‐sharing symmetric adiabatic logic for advanced encryption standard hardware design

C Monteiro, Y Takahashi… - IET Circuits, Devices & …, 2015 - Wiley Online Library
The previously proposed charge‐sharing symmetric adiabatic logic (CSSAL) in an 8‐bit S‐
box circuit is implemented in this paper using a multi‐stage positive polarity Reed–Muller …

Iterative and fully pipelined high throughput efficient architectures of AES in FPGA and ASIC

VK Sharma, S Kumar, KK Mahapatra - Journal of Circuits, Systems …, 2016 - World Scientific
This paper presents high throughput iterative and pipelined VLSI architectures of the
Advanced encryption standard (AES) algorithm based on composite field arithmetic in …

Optimization of area and delay for implementation of the composite field advanced encryption standard S-box

X Zhang, N Wu, F Zhou, F Ge - Journal of Circuits, Systems and …, 2016 - World Scientific
Among different implementations of the Advanced Encryption Standard (AES) S-box, the
implementation based on composite field arithmetic (CFA) has the smallest size. In this …