Did we test enough? functional coverage for post-silicon validation

S Pointner, R Wille - … International Test Conference in Asia (ITC …, 2019 - ieeexplore.ieee.org
The ever increasing complexity of modern systems remains a challenge for semiconductor
companies. Once a new chip has been produced, it has to be ensured that it works properly …

Exact stimuli minimization for simulation-based verification

S Pointner, A Grimmer, R Wille - 2019 IEEE International …, 2019 - ieeexplore.ieee.org
Due to the ever increasing complexity of modern circuits and systems, verification represents
one of the most time-consuming tasks in the entire design process for embedded systems …

Test Your Test Programs Pre-Silicon: A Virtual Test Methodology for Industrial Design Flows

S Pointner, O Frank, C Hazott… - 2019 IEEE Computer …, 2019 - ieeexplore.ieee.org
The ever increasing complexity of modern circuits and systems remains a big challenge for
the semiconductor industry. Since the life cycle of new products is getting smaller and …

Verifying next generation electronic systems

R Drechsler, D Große - 2017 International Conference on …, 2017 - ieeexplore.ieee.org
The application domains of electronic systems range from consumer devices to safety-
critical systems. Of course, for systems of the latter areas a thorough verification is required …

Generic Error Localization for the Electronic System Level

S Pointner, PG de Aledo, R Wille - 2019 IEEE 22nd …, 2019 - ieeexplore.ieee.org
Several methods and tools have been proposed which supports designers in verifying
embedded systems in early phases of the design process, eg at the Electronic System Level …

Improved System-on-Chip Design-Automation for Industrial Requirements/submitted by Dipl.-Ing. Sebastian Pointner

S Pointner - 2021 - epub.jku.at
In the 1920s, first thoughts towards the Field Effect Transistor (FET) were published by the
Austro-Hungarian physicist Lilienfeld. Due to their novelty and the fact that the idea could …

Converging Formal Verification in a High-Level Synthesis Environment

M Dossis - 2021 6th South-East Europe Design Automation …, 2021 - ieeexplore.ieee.org
Recent advances in silicon chip technology have facilitated the development of very dense
Systems-on-Chip (SoC) and Application-Specific Integrated Circuits (ASIC). However this …

[PDF][PDF] Test Your Test Programs Pre-Silicon

S Pointner, O Frank, C Hazott, R Wille - cda.cit.tum.de
The ever increasing complexity of modern circuits and systems remains a big challenge for
the semiconductor industry. Since the life cycle of new products is getting smaller and …

Re-utilizing Verification Results of UML/OCL Models

N Przigoda, R Wille, J Przigoda, R Drechsler… - Automated Validation & …, 2018 - Springer
Utilizing all the methods introduced in the previous chapters allows for automatically
conducting various validation and verification tasks using the UML/OCL model of the system …

A Symbolic Formulation for Models

N Przigoda, R Wille, J Przigoda, R Drechsler… - Automated Validation & …, 2018 - Springer
In this chapter, we present a symbolic formulation representing all system states of a given
UML/OCL model. We thereby do not only consider the usually assumed 2-valued logic, but …